-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|linux: RVA23U64 profile lp64d medlow multilib |1825/137|0/0|0/0|[43677eed7d22953c677bcfc905acb830e6d33be6](https://gcc.g…
-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
Unfortunately, whole register move instructions depend on `vtype`*1, which means they will cause an illegal instruction exception if VILL=1. This is generally not a problem, as VILL is set to 0 after …
-
```
+ cd build/linux-riscv64-normal-server-release/hotspot/linux_riscv_compiler2/generated
+ bash -c '/usr/bin/g++ -DLINUX -D_GNU_SOURCE -DRISCV64 -DPRODUCT -I. -I/home/yansendao/git/riscv-port-jdk8…
-
# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|linux: RVA23U64 profile lp64d medlow multilib |77/5|0/0|0/0|[27ddda8b4cb51739e841053c29d9b5f503467e99](https://github.co…