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Steps to reproduce:
```
$ cd magma
$ git checkout flatten-types-decl-coreir-bug
$ pytest tests/test_type/test_tuple.py -k test_nested
ERROR: NYI flatten types of generator or nodef module
{globa…
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I am experiencing an issue where any attempts to generate a Verilog for my test bench is segfaulting.
```
%> coreir --version
v0.1.51
```
This error can be reproduced by checking out `lake:sp…
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Even with inlining, we have bloat of wires in output verilog. See a simple add:
magma:
```python
Top = m.DefineCircuit("Top", "I0", m.In(m.UInt(8)), "I1", m.In(m.UInt(8)), "O", m.Out(m.UInt(8)))
…
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The current version preserves only input and output ports of the main module. Not preserving the names of internal signals gets very hard to analyze possible issues, and debug unexpected behaviors.
…
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This presents an alternative to cacheing that was implemented by Genesis2. This is going to change some fundamental semantics about our generator system, so it would be good to review the design of th…
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Hello...
So there are number of Transponders coming out at the mo... but personally i like the open source but at the club some have different transponders...
Is its possible to add a Ilap and Clea…
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It's come to our attention that the inclusion of a signed multiply primitive may be beneficial for generating efficient hardware. The current magma/coreir multiply primitive does not distinguish betw…
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https://github.com/David-Durst/aetherling/blob/d6ce9d86b7a9f37eb846a47ff0bea63cb8ef8029/tests/test_map.py#L41
@leonardt I should be passing a definition here instead of an instance. However, I need t…
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When I check requirements.txt I get these two errors
```
% cd $garnet; pip3 check requirements.txt
magma-lang 2.0.6 has requirement ast_tools>=0.0.10, but you have ast-tools 0.0.3.
peak 0.0.…
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I setup `gtest` to handle testing https://github.com/leonardt/verilogAST-cpp, it was really simple to integrate into a cmake based workflow.
Here's some references I used:
* https://github.com/goo…