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### Checklist
- [ ] The issue exists after disabling all extensions
- [X] The issue exists on a clean installation of webui
- [ ] The issue is caused by an extension, but I believe it is caused b…
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### 🐛 Describe the bug
If you run the code below:
```python
import torch
x = torch.ones(1, 2, 1, 1, 1, device="mps")
print(x.sum(-3))
```
The expected output is
```
tensor([[[[1.]],
…
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```
Compiling zluda_dnn v0.0.0 (/home/hina/zluda/zluda_dnn)
Compiling zluda_ccl v0.0.0 (/home/hina/zluda/zluda_ccl)
warning: calls to `std::mem::drop` with a value that implements `Copy` does…
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- xdna-driver version: git 2157a343cd25c139e34e63837f974c6d6c7eb1a9
- XRT version: release 202410.2.17.319
- #### output form `#xbutil --verbose validate -d 0000:c7:00.`
```
Verbose: Enabling Ve…
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attempting to use `autotrainer-advanced` with pytoch 2.4.0 ROCm on WSL2 Ubuntu 22.04 Windows 11
```bash
INFO | 2024-08-22 02:25:11 | __main__:train:203 - Setting up trainer...
When using the …
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### Problem Description
The two programming models OpenMP and HIP provided by ROCm leverage the same HSA runtime. HIP holds its own pool HSA queues controlled by the `GPU_MAX_HW_QUEUES` environment…
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Do you plan to add support for a [HIP](https://github.com/ROCm-Developer-Tools/HIP) backend in addition to the CUDA backend? HIP is a C++ Runtime API and Kernel Language that allows developers to crea…
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While running the QuickSilver app with Levelzero as backed I see a crash. Looks like "__atomic_fetch_add_8" support is missing.
QuickSilver : https://github.com/oneapi-src/Velocity-Bench/tree/main/…
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Hi @yxsamliu, I'm using clang -r to lower bitcode in objects that I compiled -fgpu-rdc to AMDGPU device code before link-time so that I can link without -fgpu-rdc, as I described in #77018. I am hitti…
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### Description
The jaxlib build with ROCm will fail if the ROCM_PATH is directed to a symlinked location. This issue is particularly critical for NixOS, as the ROCM_PATH is invariably a symlinked …