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This issue shall serve as a place to announce and discuss new results, to avoid the discussion being spread over several pull requests that just happened to be there (#11, #12).
So with 33f212238d, c…
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Hi, I am running the NVDLA small architecture on a FPGA.
I succeded at running almost all the flatbufs tests available in the UMD. I just have a problem with the loadable `NN_L0_1_small_fbuf` , which…
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Could this repo supports max pooling layer with different x, y strides.
I would like to implement the state-of-the-art object detector.
Thanks.
![image](https://user-images.githubusercontent.com/…
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First of all, thanks for providing RTNeural. It is a really elegant way to get a model running in the audio c++ world!
I got two questions:
1. Is there any chance to see Conv1D Transpose and tra…
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I have just read MSR report on winning ImageNet 152-layers network: http://arxiv.org/abs/1512.03385 I suggest to discuss how to implement residual blocks flexibly in Lasagne. For those who don't have …
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## 🚀 Feature
We have added MKLDNN+AMD BLIS path for PyTorch and want to upstream our changes to master branch
## Motivation
PyTorch with MKLDNN+AMD BLIS would give higher performance for DNN …
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Looking at https://docs.google.com/spreadsheets/d/1lGFf6PLGmBUSMan-YP7Vul4DpRNfn6K8oeCjBILe6uA/edit#gid=857482380, it seems that cuDNN instead of default CUDA can boost lczero performance. I tried to …
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Implemented weighted-multi_input-`[shortcut]` layer with weights-normalization, added:
New [shortcut] can:
* can take more than 2 input layers for adding: `from = -2, -3` (and -1 by default)
*…
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Hey there @palle-k, I really love this project and I think it is really awesome! I'd really like to help out and contribute, but DL4S seems pretty complete to me. Is there anything that I could help w…
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I was reading the Posit Standard and notice that it says that the quire cannot overflow up to `2^c-1` additions (with `c=nbits-1`, which, if I understand correctly, is the parameter `capacity`).
My…