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It is the *output* of LiteX -- this demo should be an example of running LiteX using the SymbiFlow tools.
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For Interrupts to work on Zephyr with EOS S3 (and so that SPI can work?): https://github.com/zephyrproject-rtos/zephyr/pull/28291
For OpenOCD flashing support to work on Zephyr: https://review.op…
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This issue is mostly for "housekeeping" purposes, so that the problem described here is known about.
Issues with the existing TPA6130A2 headphone amplifier driver are two-fold:
- The driver cannot…
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Regarding "FPGA SDRAM Communication: Avalon MM Host Master Component Part 3" wiki page.
It's better to reserve the memory with device tree instead of mem= kernel boot argument. If you reserve the mem…
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Hello all,
I would like first to thanks to all team of ETH for the excellent project and contribution for the RISC-V project. I have been working in a project to use pulpino as my RISC-V processor …
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Hi, robertofem
I have tried to run supplied examples in Linux environment for HAN pilot platform from Terasic that uses Arria 10 SoC FPGA.
However, I met several problems..
First, supplied D…
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I am running an OpenThread application on the LIDAR-Lite v4. This application works completely as expected and without errors on the nRF52840 DK. When I run it on the Garmin device, it consistently re…
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Is there a way to make FPGA changes sticky across reboots/power cycles? For instance I always have to manually set color space to ycrcb on each power up.
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The demo is not currently buildable, as it is hard-coded to expect Libero SoC V2023.1 - but the current release is V2023.2.
### Replication
Install the latest Libero SoC and do the licence-server-…
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Hi,
When I try to compile the dts file with dtc, I'm getting:
`FATAL ERROR: Unable to parse input tree `
Is there something I'm missing?
I'm using the command:
`dtc -O dtb -o socfpga_cyclon…