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I can't create a timer ,as the osTimerNew always return 0,where is the problem?
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### Description
Sorry to bother here. But I noticed that the STM32 support is using hardware timers for the main RTOS timer instead of the SysTick timer. This results in certain PWM pins not being av…
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Hi,
I encounter an issue when updating CMSIS 5.01 to CMSIS 5.2
I am using Keil to compile and Flash a LPC4337 processor.
Both core are using RTX5, M4 core is using Systick timer for the kernel an…
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Hi,
I'm using CMSIS Driver(with STM32) and CMSIS RTOS2(with FreeRTOS) for my project. The CMSIS Driver (whether it is SPI/USART) will trigger a callback and pass an event flag when it's complete some…
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### Description
- Type: Question
- Related issue: `#abc`
- Priority: Blocker | Major | Minor
## Question
I opened a Stackoverflow issue regarding my question - [StackOverflow](https://stackov…
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Idle and Timer threads in RTX, should have configurable option for osThreadAttr_t::tz_module
https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS/RTOS2/RTX/Source/rtx_lib.c#L131
@bulislaw @c…
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I have few doubts in SVC context switch implementation.
1. https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S#L84
Are we trying to store link register in…
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The code file msgqueue uses __CLZ: https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c#L258
Code snippet:
```
if ((__CLZ(msg_count) + __CLZ(block_size))…
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In case of non-secure code, stack pointer was not getting updated properly whenever context switched to another thread.
Issue at https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS/RTOS2/RTX…
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### Description
- Type: Question
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## Question
How do I get the available stack of the main thread? I see there is a member functi…