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vscatterqpd [rsi+zmm31*1+0] {k1}, zmm0
assembles as (pardon the mix of Intel and gdb syntax):
vscatterqpd %zmm0,0x0(%rsi,%zmm15,1){%k1}
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Running hjwasm 2.28 on a 64-bit linux system (32-bit Windows version still crashes rather than displaying error messages), I get a rather unhelpful error message:
Error A2168: General Failure
Co…
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This code is rejected by the Uasm assembler:
vsubsd xmm31, xmm31, xmm0
vaddsd xmm31, xmm31, xmm0
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This is the code:
TITLE cpuidhlp
_TEXT SEGMENT
fpu_init proc
mov rax, 1
ret
fpu_init ENDP
_TEXT ENDS
END
Compiling with HJWasm 2.30 with -c and -win64 assembles properly (same as Mic…
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This code:
kmovw k1, 01010101b
vblendmpd zmm0{k1}, zmm2, zmm1
assembles as:
kmovw k1, k0 ; 0000 _ C5 F8: 90. C8
push rbp …
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In 32-bit the Borland/Delphi Register calling convention (this is the default calling convention in Delphi) passes the firsts 3 parameters in registers EAX, EDX and ECX, in this order. Remaining param…
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Latest HJWAsm32 crashes. Download the zip file below. Run crash.bat. Sorry the zip file is so big, trimming it down to minimum size would be a bit tedious.
https://www.dropbox.com/s/08kf4qyssvq4…
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vpsllvd zmm15, zmm13, zmm7
assembles as
vpsllvd zmm15, zmm13, zmm15
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.686
.XMM
.MODEL FLAT
.CODE
pinsrw mm0, eax, 0 ; 0F C4 C0 00; ok
pextrw eax, mm0, 0 ; Error A2049: Invalid instruction operands
; - should be 0F C5 C0 00
pextrw eax, xmm0, 0 ; 66 0F C5 C0…
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movq mm0,[eax]; 0F 6F 00 ; ok
movq [eax],mm0; 0F 7E 00 ; wrong (it's movd, not movq), should be 0F 7F 00
movd mm0,[eax]; 0F 6E 00 ; ok
movd [eax],mm0; 0F 7E 00 ; ok
movd xmm0,[eax]; 66 0F 6E 0…