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maybe we could get this working on the below fpga with built in memory controller.
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=816&PartNo=2
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FPGA Device
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Please enhance the "enum Machine" with these Architectures:
6 Intel 80486
36 Renesas V800 series
37 Fujitsu FR
40 ARM
42 Hitachi SH
44 Infineon TriCore
52 Motorola ColdFire
54 Motorola MCore
58 Motoro…
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This due to faulty recursive interrupt disable / enable in the LwIP port for the Nios II core.
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Hi,
I would like to use your code as a starting point to communicate with a device over usb with the Altera as a usb host.
Could you advise me how this could be possible? I am not yet an expect wit…