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Around line 293 of src/drivers/sifive_fe310-g000_pll.c:
```
/* Wait for PLL to lock */
while((__METAL_ACCESS_ONCE(pllcfg) & PLL_LOCK) == 0) ;
```
Section 6.5 of the FE310-G002 Manua…
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I run the commands to clone the repository and start building but failed.
`$ make -f Makefile.x300artydevkit mcs`
`make -C /home/a/mf/multizone-fpga/rocket-chip/firrtl SBT="java -jar /home/a/mf/mult…
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I have attached gpio block from sifive to my rocket chip.Can you help me how can I connect my gpio with rocket chip.As When I connect gpio and run rocket chip it is giving me I/O errors as I haven't c…
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Using the hifive1 toolchain, I can produce an ELF file (ld script ok and with --gc-sections) with the following header:
```Program Header:
LOAD off 0x00001000 vaddr 0x20400000 paddr 0x2040…
U2654 updated
3 years ago
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After compiling, and flashing the spi_wifi.rs example to a hifive1 revb board, the example does not work.
Expected to see this over the terminal:
> WiFi Test
> resp: OK\r\n
Instead, I get th…
o080o updated
3 years ago
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**System information**
- OS Platform and Distribution: Ubuntu 18.04
- TensorFlow installed from: source
- TensorFlow version: 298534b745db43b2ad18256ed781bd2f142e5bc7
- Python version: 2.7.15+/3.6…
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**Describe the bug**
The Kernel fails to initialize the network interface on the HiFive Unleashed board. After boot is completed, there is no eth0 interface, only lo and sit0.
Left led on the netw…
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I'm getting strange results when stepping through code with GD32VF103. I have a code that reads a register (RCU_CFG0) and the next line has an `if` over that value. If I place the breakpoint on the as…
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Hi I am trying to synthesize the arty bitstream but I am getting an error. Any suggestions?
```
% make -f Makefile.e300artydevkit mcs
VSRC_TOP=/media/esdentem/Venture_Data/projects/riscv/free…
esden updated
3 years ago
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`gdbstub` makes it very easy to add a GDB server to any project. The current design uses long-polling to interact with the target. Conceptually, `gdbstub` sits between a network `Connection` and the `…