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similar to https://github.com/radareorg/radare2/issues/15912
from ghidra:
```
//
// bootloader2-code1
/…
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Since the tricore rust toolchain is based on the LLVM backend the tools objcopy and addr2line from the LLVM toolchain should be used
rename:
- objcopy -> llvm-objcopy
- addrline -> llvm-addr2line
…
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**Describe the bug**
mfcr/mtcr instructions show in disassembly but not in the decompilation.
**To Reproduce**
1. Open attached sample created by free gcc toolchain for tc1767
2. Go to isync ins…
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Hi,
i am trying to merge this TriCore target into the current version of llvm.
I fixed some minor changes, but am stuck at here:
[ADJCALLSTACKDOWN](https://github.com/TriDis/llvm-tricore/blob/tri…
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Hello,
for a project utilizing the compiler mentioned in the title we are looking for a different build system. Does fastbuild support it in a way? I saw a related question from 2020, but it is orp…
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**Is your feature request related to a problem? Please describe.**
The TC29x is working well. Infineon makes a similar processor which has less on-board memory
**Describe the solution you'd like**…
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Hi,
I just found out that starting from version 5.0.1, the value of CS_OP_MEM (accessed from the python library) has changed, from 3 to 128, potentially causing issues in automated tools that make…
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I have tried to build this and it will not build. Also the llvm-tricore distribution you reference will not build as well. Can you provide information on how to build a release. Any help would be grea…
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`/* 8995 = sizeof(tar_header_t) * ARCHIVE_FILES */` followed by a hard-coded 8995 demonstrates that the source assumes the amount of padding an ABI will do. For Infineon TriCore, this does not hold. […
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Using gcc11.4 on linux-ppc
```
$ make -j3
CC cs.o
CC SStream.o
CC utils.o
CC MCInstrDesc.o
CC MCRegisterInfo.o
CC MCInst.o
CC MCInstPrinter.…