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On a fresh Conda / Artiq installation the dashboard fails with the error:
```
[...]
from PyQt5 import QtCore, QtGui, QtWidgets
ImportError: DLL load failed: The specified module could not be …
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I installed artiq 2.3 on our virtual box using,
```
rabi@68810MAGTRAPVM:~$ conda create -n artiq-2017-05-04 artiq-kc705-nist_qc2 -c m-labs/channel/main
```
With the following packages in the env…
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The following experiment errors-out with a ConnectionResetError:
```python
class TestAsyncRpc(EnvExperiment):
def build(self):
self.setattr_device("core")
@rpc(flags={"async"})
…
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... seems to be around 25 kB/s currently (rust/smoltcp). Should and could be much faster.
https://irclog.whitequark.org/m-labs/2017-03-17#1489751108-1489752071;
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smoltcp doesn't support PPP/SLIP or something like those.
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Testing SAWG absolute/relative phase [modes](https://github.com/m-labs/artiq/blob/master/artiq/coredevice/sawg.py). I see undesired oscillation.
# test 0
```
$ cat test_ap2.py
from artiq.exp…
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As I go through the contract testing the various features, I notice that one of the bullet points states the following:
> • Implement SPI protocol and PDQ register layout with protocol documentati…
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We did thermal simulations of Sayma AMC.
It seems that the most critical parts are SFPs.
I specified 1W per transceiver. What SFP models will be used?
![obraz](https://cloud.githubusercontent.com…
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![image](https://user-images.githubusercontent.com/32116397/32132216-d82fe270-bbfa-11e7-84e6-83f3e02cc3a4.png)
"Load boot.bin into memory" I have stopped at the state. [nexys4_ddr fpga bo…
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```
from artiq.experiment import *
class DMABlink(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("core_dma")
self.setattr_device…