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Decompiler has a bug related to order of instructions if trap instruction used.
![изображение](https://user-images.githubusercontent.com/7189309/74139024-aed48e80-4c03-11ea-8046-3c8ee6a6d982.png)
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Did anyone get this problem while starting osmud service?
root@OpenWrt:/# [20755.874483] osmud[2558]: segfault at 8 ip 00007fb36e369b9b sp 00007ffd083879d0 error 4 in libc.so[7fb36e348000+68000]
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When using the `term` serial communication programm with the mfp driver on 68000,
I am unable to open the serial port:
`term /dev/ttyS0` properly opens the serial port, but no characters are displ…
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There is the following code. As you can see here, it uses A4 as Base register, and it uses negative offset to point to ram.
```
002204b2 movea.l (-0x7ccc,A…
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The MiSTer for of Minimig uses the FX68K core instead of TG68 for cycle accurate CPU reimplementation when running in 68000 mode. Would it be possible to backport this feature to upstream to have it o…
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**Describe the bug**
Ghidra incorrectly disassembles certain `move*` 68000 instructions, specifically instructions where the addresses are sign extended.
For example, Ghidra disassembles the ins…
zznop updated
4 months ago
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Actually versioning only prints the version of the exe ---> 0.106 a0.1
However it would be nice to have a "full" versioning with more details
"Mame 0.106 a0.1"
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Consider this test case. A4 is odd, so there's an address error. Yet, the "final" value is incremented by 2, as if the post increment happened before or in parallel with the memory access. Is this …
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Hey what's up? Checking in to see if there have been any thoughts about a port to the M68K architecture? So the 68000 and 68010 CPUs.
Hobbiest boards, Sun2, Sun3, early Mac, SHARP X68000 systems, th…
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Hello @wangleihitcs , I found out that `my-test-68000` file is missing in data/model/my-test-68000. Can you provide that or do I have to train myself and create model file?