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With the new VQ file (top_post_synthesis.no_split.v) supporting the bus signals, we get syntax error when compiling in the simulator:
# ** Error: D:/Tamar2/System_Engineering/AntMicro/QLSOFA/OpenFP…
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Hello!
[Goodboy Galaxy](https://goodboygalaxy.com/) has a rumble feature which works in the same way as Drill Dozer (both GB Player rumble and GPIO3 rumble are supported)
Sadly, the rumble pak s…
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I'm trying to generate an FPGA with different tiling configurations i.e. 2x2, 4x4, 8x8, etc.
I see there are two places to edit the VPR size
1. task.conf `openfpga_vpr_device_layout=8x8`
2. OpenFPG…
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We would like to support LUTRAM mode, where CLB can be configured to dual-port RAM.
This feaure uniquely exposes the structure of config bits to the customer, we need to enhance OpenFPGA so that c…
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Is there any possibility to use OpenFPGA Loader on Cyclone V 5CSXFC6C6U23C7?
Will support be added for that chip?
Thank you, best wishes!
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Right now I see VPR arch files in the `$OPENFPGA_ROOT/openfpga_flow/vpr_arch` folders being used in the `task.conf` file reference via `${PATH:OPENFPGA_PATH}` variable. How might I be able to supply m…
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According to the document of OpenFPGA, The supported connecting patterns are subset, universal and wilton in each switch block. However, even if I used the custom switch block, it still generates veri…
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> **Describe the bug**
I am a student who started to learn openfpga weeks ago and I don't how to solve the problem. Anyboby can help me?
ERROR 1
Type: SDC file
line: -1
message: syntax error,un…
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I'm using the latest Analogue Pocket firmware which at this time is **1.1** [2023-05-04].
The problem happened while playing Pokemon Emerald (GBA). After creating a _Save State_ (Memories) and lo…
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> **Describe the bug**
I am trying to run a task that involves utilizing dsp in the fabric. I am running the task.conf located openfpga_flow/tasks/benchmark_sweep/mac_units/config/task.conf
> **To…