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The following code works when targeting DXIL and fails to compile when targeting SPIRV
SPIRV:
```bash
DXC_Debug_BUILD/bin/dxc scratch/asuint_spirv_test.hlsl -T lib_6_8 -enable-16bit-types -spirv -f…
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On RDNA gpus, shift vector instructions are much faster when the shift amount is a splat constant. However, we seem to emit non-splat shifts for int4 matvec from LLama2:
Input
```mlir
func.func @…
kuhar updated
1 month ago
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**Is your feature request related to a problem? Please describe.**
Constant samplers are described in HLSL for DXIL in the root signature. That does not work for Vulkan because constant samplers ar…
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(llm) E:\chatcode>set SYCL_CACHE_PERSISTENT=1
(llm) E:\chatcode>set BIGDL_LLM_XMX_DISABLED=1
(llm) E:\chatcode>**python chatglm3_infer_gpu.py**
D:\Users\admin\anaconda3\envs\llm\lib\site-packag…
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We would like to use some of SPIR-V’s bitfield intrinsics, namely OpBitfieldInsert, OpBitfieldUExtract, and OpBitfieldSExtract, OpBitReverse, and OpBitCount on a mix of integer widths (i8, i16, i32, a…
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Unions are problematic in SPIR-V:
1. We cannot perform pointer casts in shaders.
2. We cannot load values using OpSpecConstantOp. This means that any struct which contains a union value needs a crea…
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I haven't been able to find a way to PM @johnkslang nor any forums or anything where compiling to SPIR-V is being discussed so this is as much a question as an issue. As far as I can tell it looks lik…
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I implemented the first, naive (yet fully working) GLSL writer in less than 12 hours. I think it’s worth it to write a SPIR-V writer as well, and it shouldn’t take too much time.
It’s not my own pr…
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## Motivation
Currently, SPIR-V backend has no way distinguish decorated types (in SPIR-V, decoration instructions modifies types/variables/functions/etc attributes). for example, in the below code…
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SPIRVEmitIntrinsics pass besides emitting spv_track_constant also emits redundant and invalid spv_assign_type calls for null constants, for instance in case of builtin nulls:
```
define spir_kernel …