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https://github.com/ChampSim/ChampSim/commit/fb87c5daaf3b637363c9e95483999852cf291edd#commitcomment-64121863
@alberto-ros I'm migrating the discussion here so that it has more visibility. CC: @sethp…
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Hello,
I'm running `erasure_code/erasure_code_perf` with different `[GT_L3_CACHE](https://github.com/intel/isa-l/blob/master/erasure_code/erasure_code_perf.c#L46)`.
And I find that different `GT_L…
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The code in `MOLFiniteDifference` is getting pretty messy as we add more functionality for nonlinear laplacian, upwinding, etc.
One way to simplify the code would be to have an intermediate matrix …
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I've got a small box running an Intel [J4105](https://www.intel.com.au/content/www/au/en/products/sku/128989/intel-celeron-j4105-processor-4m-cache-up-to-2-50-ghz/specifications.html) CPU.
When run…
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I have tried changing the flags in the config to make sure all cores are being used and also set the % of CPU all the way up
ie
"max-cpu-usage": 100,
"threads": 8
but the hash rate never changes…
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How do you write a prefetcher in Scarab? What components/functions do you need and how do you integrate them? I've been trying to understand the stream prefetcher in particular. What do the pref_strea…
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Currently, it's possible to convert from an array or array pointer to a slice, but
there's no way of reversing
this.
A possible syntax could be similar to the current notation for type assertions:
…
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### Environment
0.10.0
### Describe the bug
AVSF now creates extra clip instances.
I put two debug lines into my plugin where "++++" marks construction and "~~~~" marks destruction.
0.9.4:
`…
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Hi,
I am getting MSR Allocation errors on Intel Clear Linux
![3AB07997-7B5F-4302-898D-EEF1C74B2315](https://user-images.githubusercontent.com/36264810/102703897-0049a300-4243-11eb-9197-ba5f33abd2…
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ChampSim's approach to a virtual memory system is currently very basic. It provides the basic functionality of separating the address spaces of multiple processes, but it doesn't correctly model the …