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The Terasic DE1-SoC board has a Cyclone V on it. Specifically, a 5CSEMA5F31C6 connected through an onboard usb-blasterII
Here's the two-line patch to add support for this board:
```
diff --git …
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We want to understand what the "bare minumum' / simplest setup and workflow we can achieve for making HDL changes and getting them deployed.
Issue can be used to write down our progress and any int…
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As the HDL-generation part has had a big overhaul, it would be great if also the Xilinx-FPGA path can be tested.
As I mainly use Intel (Altera) FPGA's, I do not have the ability for the moment to che…
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Hi, thinkoco
I've followed your guide: `https://github.com/thinkoco/c5soc_opencl/blob/master/documents/HowToBuildSDImage.md` to build lxde image. But when I boot the image to de1 and use VGA to conne…
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Dear Bsteinsbo,
I am begginer in SoC devices, i have the DE1 SoC and i have to implement a aplication that play a wav file from sd card memory, i try with the LXDE system but there is not audio outpu…
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I trying the example of streams-url_mp3-i2s and I had to add all the libarys to schetch before it was reqoinized. Maybe it something in my config but it is compiling now. I have also the a2dp working …
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**Describe what aspect of our project needs to be researched**
Research how we can use a camera with the DE1, including what interfaces we can use and how we can actually operate the camera.
**Add…
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After resolving issue #3 I am now testing with the SNES core, and it almost looks correct but every second or so there is some screen "glitch" that seems to come from some kind of out-of-sync thing. T…
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Hi,
Currently, at our University, we are teaching an introductory hardware course that teaches students the basics of building circuits. We are hoping to use Logisim as the tool to help students le…
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Hi,
I have been trying to download the circuit design in Logisim onto the Altera DE1_SoC board that I have. I am using the file containing the information of the board and the pins that I created a…