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the formula for these appears to use the 1/sqrt(a) estimate operation, which presumably results in Inf for a=0. Probably need to explicitly check for a==0 and mask result accordingly.
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| | |
|--------------------|----|
| Bugzilla Link | [PR31266](https://bugs.llvm.org/show_bug.cgi?id=31266) |
| Status | NEW |
| Importance | P normal |
|…
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The context for this is https://github.com/rust-lang/rust/issues/116558: passing vector types by-value over `extern "C"` needs certain registers to be present, so if the target feature enabling these …
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Right now with both clang-16 and clang-17 it triggers a:
```
fatal error: error in backend: Cannot select: intrinsic %llvm.ppc.altivec.vabsdub
```
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```
:info:build [ 14%] Building C object CMakeFiles/CsoundLib64.dir/OOps/pffft.c.o
:info:build /opt/local/bin/gcc-mp-12 -DCS_DEFAULT_PLUGINDIR=\"/opt/local/var/macports/build/_opt_PPCSnowLeopardPort…
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## 🐛 Bug
When building the cpp_extensions tests from the master branch, on ppc64le platform, the compilation fails on the (somewhat) recent addition of rng_extension.cpp.
Note that this is in the …
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I'm testing a version in TenFourFox that tweaks the VSX code to run under AltiVec/VMX (there are some missing intrinsics and it's always BE, but otherwise it mostly "just worked"). Is there interest i…
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Dear All,
I'm trying to build OpenJ9 on the PPC SoC equipped with e500v2 core. This core doesn't have the AltiVec IP block (Instead it uses the SPE extension for floating point calculation).
The…
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First, I think having generic SIMD types like `@Vector(T, N)` (#903 or any other syntax) with most arithmetic operations defined on them is really nice and is useful to many people.
However, this w…
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AVX, SSE, Altivec, ...