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[libriscv](https://github.com/libriscv/libriscv) is a compact yet comprehensive RISC-V userspace emulator library crafted for effortless embedding and extensive adaptability. It boasts a high-performi…
jserv updated
2 months ago
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Is this the right place to PR for Banana Pi BPI-F3?
*SpacemiT K1 8 core RISC-V*
https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3
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As the risc-v port is in progress by Samsung which doesn't appear to have a visible roadmap to the public, I don't think it's fair to start lodging tickets on the main repo. Historically I've suggest…
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### What new feature should Elvish have?
I came across this while doing my usual RISC-V shenanigans: https://github.com/u-root/gobusybox
Sophgo uses u-root as part of their bootloader which is super…
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Sorry for the incovennience but can be good if box86 and box86_64 can receive support for POWERISA and RISC-V architetures these two is RISC architeture
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### Describe the bug
Currently the DPC++ driver uses `llc` to lower the IR module produced by `clang-offload-wrapper` to an object file. When doing so it ignores target features (none of the target…
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### Bug Description:
When executing the `amoxor.d a1, s4, (s4)` instruction, a discrepancy was observed between the behavior of Spike and NutShell processors. Specifically, when the value of register…
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The boot flow on ARM and RISC-V are largely similar, thus is seems worth to unify them. Either the common parts are factored out in a shared file, so the architecture specific part still has the full …
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This is based on the suggestion in slack at https://adoptium.slack.com/archives/D02FJ8V16Q6/p1637061299000100?thread_ts=1632900859.002400&cid=D02FJ8V16Q6 - many of the Bisheng11 sanity.openjdk suite t…
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I have cross compiled MPI program and generated a statically linked executable. I booted riscv-linux using spike and I tried to execute above mentioned executable. Surprisingly execution resulted in f…