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For a RV64 implemention with supervisor mode supported, when CSRs and functionality of Ssstateen extension are completed, would the Smstateen extension become a mandatory option?
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See title
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https://wiki.sipeed.com/hardware/en/lichee/th1520/lpi4a/10_test_report.html
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C(++) Compiler Master List:
- [x] ARM
- [ ] Keil
- [x] GCC
- [x] clang
- [x] aarch64 (gcc)
- [x] aarch64 (clang) - see #174
- [ ] TCC
- [ ] Hexagon DSP
- [ ] Qualcomm…
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Hi,
Having fun and playing with the idea of generating graphics with linux framebuffer and riscv assembly code of my computer. I already got my random generator to flush the screen with noise. But …
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Is there a sail module to parse and read instructions from a compiled binary file? If so, are there examples of usage which I can follow from somewhere?
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I have just recently installed RARS as a replacement for RVS and there doesn't seem to be the ability to display the hex and decimal value at the same time.
If there is already a way to do this apo…
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### Why is it worth to add this package?
As we have `qemu` and the termux official QEMU UEFI firmware, `ovmf`. However, it could only boots up x86-64 systems with this.
We planed reimagining new…
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**What will you do?**
Support LLVM [Global Instruction Selection](https://llvm.org/docs/GlobalISel/index.html) for a subset of [RISC-V Vector Extension](https://github.com/riscv/riscv-v-spec/blob/m…
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Keep in mind that this will be no small undertaking. Unless you're a schizophrenic with 10 years of free time, we should start with minimalist goals, e.g.
- instead of re-targeting the x86_64 HolyC…