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Hi,
I am just wondering, where do I find the code for BL33. I am just curious and going through the OPTEE code base right now. The arm-trusted-firmware repository has BL1,2,31 and BL32 would be th…
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Excuse me, I am a newbie of tee OS to support 64 bit architecture.
It seems the newest optee OS can support 64 bit cpu architecture.
However, I found there is only aarch32 smc vector table assembly (…
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Hi all,
We do not have enough spare SRAM to use for running EL3 in SRAM and want to load it in a TZC configured region of DRAM (DRAM was initialized in BL2). We reclaim our SRAM for other functional…
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This has been a persistent issue for me recently, but mostly I have been able to fix it by forcing pexpect==3.3 after installing a WA update. However, on my new desktop this doesn't help things.
I ha…
credp updated
8 years ago
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Looking at the firmware-design.md (page 21) "Juno with BL3-2 in Trusted SRAM (default Option).
BL1 reserve memory for RW area (in arm_bl1_early_platform_setup)
BL1 reserve memory for BL2 (during load…
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Hi,
When EL3 triggers an Abort Exception, the EL3 abort handler is not called and ISR_EL1 reports that an Abort is pending.
SCR_EL3[EA] allows to trap Aborts from lower levels but secure EL3 interrup…
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Java 8's bytecode introduces some compile-time optimizations over Java 6's bytecode.
Forge defaults to the outddated Java 6 bytecode, and no one should be using JDK6 anymore, it's pointless to default…
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The major PSCI changes in https://github.com/ARM-software/arm-trusted-firmware/pull/361 introduced some logging into the BL31 runtime code where previously there was none. For example, `psci_print_pow…
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in plat/arm/common/arm_bl31_setup.c (line 167)
the following crash when BL32_BASE is not defined since bl32_ep_ingo->spsr is set to 0 by arm_get_spsr_for_bl32_entry() in arm_bl2_setup().
```
bl32_ima…
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TF currently supports the following use-cases:
1. Using all TF BL images.
2. Using TF's BL3-1 but not the other TF BL images. The assumption in this case is that non-TF ROM code does the equivalen…