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Add a pass that implements structural deduplication of FIRRTL modules. Differing annotations should not block deduplication, but should cause these to be promoted to non-local annotations.
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Currently, if a user uses the `BoringUtils.bore` API to read from a port, an additional port will be created. This should be changed to use the port directly. Consider the following Chisel:
```sc…
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**Impact**: software
**Tell us about your environment:**
*Chipyard Version: 1.5.0, Hash: b5d013190d637e634113cb5179f8c8885df1945a
*OS: `Linux sjchpc01-ux 5.4.0-65-generic #73-Ubuntu SMP Mon Ja…
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Input:
```firrtl
circuit Widths:
module Widths:
input x : UInt
input y : UInt
output out1 : UInt
output out2 : UInt
wire w : UInt
w
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The FIRRTL spec currently allows for string-encoded integer literals, e.g., `"hDEADBEEF"`, to be used in almost any location where an integer is accepted. Because this has been how the SFC has worked …
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Add a pass to the FIRRTL Dialect that implements Scala FIRRTL Compiler-style constant propagation.
The tests in the Scala FIRRTL Compiler should provide guidance here: https://github.com/chipsalli…
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```
********************
Failed Tests (1):
CIRCT :: Dialect/FIRRTL/extract-classes.mlir
```
https://github.com/llvm/circt/actions/runs/5311575905/jobs/9614969261
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Add an option that implements the same policy/algorithm of the Scala FIRRTL Compiler for doing dead code elimination.
The following tests should all pass (possibly with some options/annotations ap…
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Currently, IMConstantProp assumes all the incoming values to have ground types. Towards https://github.com/llvm/circt/issues/2130, it is necessary to generalize to subacesses.
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Following input crashes due to getFieldName not being supported (used to report error in InferWidths):
```firrtl
circuit NoWidthEnum:
module NoWidthEnum:
output o : {| Some : UInt, None |}…