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Hi,
Benchmark_ITT segfaults in MPI run when nranks > 1 just after printing "Initialised RNGs". I have observed this same segfault on Perlmutter as well as a local cluster.
$ mpirun -np 2 ./Benchma…
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For the T4 device, setting the values for DIO 4 and 5 just like below. It ignores the first writeName function and overwrite its value on the second value also. The result will be `5, 5` instead of `…
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```
Assertion failed: isa(Val) && "cast() argument of incompatible type!", file C:\Users\rysza\lib\llvm-19\llvm\include\llvm/Support/Casting.h, line 578
PLEASE submit a bug report to https://github.…
R-Goc updated
1 month ago
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### Port, board and/or hardware
Raspberry Pi Pico
### MicroPython version
MicroPython v1.23.0 on 2024-06-02; Raspberry Pi Pico with RP2040
### Reproduction
```py
import os
def core1_t…
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Trying to follow the instructions on [this Intel reference page](https://www.intel.com/content/www/us/en/developer/articles/guide/building-software-acceleration-features-in-the-intel-qat-engine-for-op…
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env:
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|---|---|
|cpu|Intel(R) Xeon(R) CPU E5-2680 v4 @ 2.40GHz|
|nginx | asynch_mode_nginx-master
|openssl | OpenSSL 1.1.1f 31 Mar 2020
|QAT Engine | QAT_Engine-master
|QAT driver | QAT.L.4…
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I'm trying to make use of logisim-evolution for education purpose, when I tried to verify the FPGA workflow I found the behavior of memory in simulation and generated VHDL is different.
For example…
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### Description of defect
Some asynchronous methods in the now deprecated class `RawSerial` are no longer accessible from the new class `UnbufferedSerial`, as now it inherits privately from…
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The section at the end of the teams intro about synchronization between team creation events is confusing and convoluted.
The requirements to avoid synchronization between team create events are to…
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