-
Hi
I tried reconstruction using the FBP algorithm. The objects in the reconstructed images were observed to be shifted in a vertical direction. The images were taken with a static detector. From 0th…
-
There is one bigger and two minor thingies here but idk if creating 3 separate issues is a good thing in this case.
So I'm implementing DDR mode where data is sent on both clock edges. Unfortunatel…
-
Trying the last few commits of this repo to build images that support the clearfog variant of your board, but none are bootable. So far, I've tested SD1= 13/14/17/21 and all fail with the same error:…
-
### The problem
Hello,
I see Memory monitor for Juniper device only collect Buffer for Line card.
Is it possible to monitor Buffer and Heap? Heap seems to be more important than Buffer
```
Sl…
-
```
The circuit diagram here
http://tlc5940arduino.googlecode.com/svn/trunk/Tlc5940Mux/tlc5940mux_circuit_exa
mple.png
is clear. I'm trying to use the second option (ie using a shift register on one…
-
```
The circuit diagram here
http://tlc5940arduino.googlecode.com/svn/trunk/Tlc5940Mux/tlc5940mux_circuit_exa
mple.png
is clear. I'm trying to use the second option (ie using a shift register on one…
-
```
The circuit diagram here
http://tlc5940arduino.googlecode.com/svn/trunk/Tlc5940Mux/tlc5940mux_circuit_exa
mple.png
is clear. I'm trying to use the second option (ie using a shift register on one…
-
```
The circuit diagram here
http://tlc5940arduino.googlecode.com/svn/trunk/Tlc5940Mux/tlc5940mux_circuit_exa
mple.png
is clear. I'm trying to use the second option (ie using a shift register on one…
-
Hi,
I struggled with this strange issue for a couple of days and finally found out that,
for some weird reason, configuration failed (DONE pin on the FPGA not coming high)
when I tried to load a L…
-
I discovered that when I was making the pull request bellow,
https://github.com/sifive/freedom/pull/118
when I tried updating the submodule `fpga-shells` commit 9eb56625ba252e6abbb7ded5158331b7da7ea…