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Here's how I pass the device argument for function Seq2rel
```
from seq2rel import Seq2Rel
from seq2rel.common import util
model = 'model.tar.gz'
kwargs = {'cuda_device': 1}
seq2rel = Seq2Rel(mo…
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```
python: /runner/_work/intel-xpu-backend-for-triton/intel-xpu-backend-for-triton/third_party/intel/lib/TritonIntelGPUToLLVM/Utility.h:113: mlir::Value mlir::LLVM::intel::getSharedMemoryBase(mlir::…
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### 🐛 Describe the bug
- [x] test_noncontiguous_samples_native_dropout_backward_xpu_int64: CUDA fails with same error, IPEX has no such case, will skip. (RuntimeError: "masked_scale" not implement…
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### Feature, motivation and pitch
IPEX uses `torch.jit.trace` and `torch.jit.freeze` to compile models when it is selected as the backend of `torch.compile`. However, this hard-coded implementation l…
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A770 Ubuntu22.04
cpm.py
```
import torch
from PIL import Image
from ipex_llm.transformers import AutoModel
#from transformers import AutoModel
from transformers import AutoTokenizer
import t…
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### System Info
```Shell
Custom sdxl training script using fsdp GRAD_SHARD_OP with cpu offset.
After upgrading accelerate from 33.0 to 34.0, after collecting state_dict with accelerator.get_state_…
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Hi,
From #430, it seems that 8da4w is primarily for Executorch, and is set to be deprecated. Please advise if there are any plans to enable it for CUDA & CPU as well, such that int4 weights could b…
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The latest Triton refactoring removed the Intel Triton backend from the third-party, `llvm-target` branch is a fork of `openai/Triton` with in-tree modifications.
To upstream Intel XPU Triton backend…
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Hi, thank you very much for composing this fantastic book covering the FDTD technique in amazing detail and releasing it freely!
Are there any plans to include a chapter or section on GPU implementat…
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### Describe the bug
Running ```
./compile_bundle.sh /opt/intel/oneapi/compiler/latest /opt/intel/oneapi/mkl/latest
```
with xpu-master(5fdf9e64581769fb8d5b0c1ffabb5f70fc3793bd) and get the follow…