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| Bugzilla Link | [PR2949](https://bugs.llvm.org/show_bug.cgi?id=2949) |
| Status | NEW |
| Importance | P normal |
| R…
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The attribute `Tag_RISCV_arch` is defined as a valid argument for `-march` to describe the ISA extension as defined in the ISA extension naming convention, which is part of the RISC-V unpriv specifica…
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Thanks @panamantis .
@xiaer1 You can download the two .pkl from this link [https://drive.google.com/file/d/1LgyjtDmf3Xd1txwq8HwKD6d6VJj5pLmn/view?usp=sharing](url).
_Originally posted by @JasperGu…
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The string accepted by `-march` currently deviates from the ISA naming strings described in chapter 22 of the RISC-V User ISA manual. Should compilers accept strings in the form `march=rv32imcXfoobar_…
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This is just a minor issue, but I've been trying to get spike working with 32-bit binaries and have found that supplying --enable-32bit here causes build failures (there's no -m32 option any more), bu…
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### Zig Version
0.12.0-dev.2631+3069669bc
### Steps to Reproduce and Observed Behavior
1. Install zig 0.12.0-dev.2631+3069669bc on a VisionFive2
2. Run `zig targets`
```
"native": {
"tripl…
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| --- | --- |
| Bugzilla Link | [37601](https://llvm.org/bz37601) |
| Version | trunk |
| OS | Windows NT |
| Blocks | llvm/llvm-project#31672 llvm/llvm-project#36950 |
| CC | @adibiagio,@leg…
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| --- | --- |
| Bugzilla Link | [35679](https://llvm.org/bz35679) |
| Version | trunk |
| OS | Windows NT |
| Blocks | llvm/llvm-project#11360 llvm/llvm-project#35028 |
| CC | @topperc,@ZviRa…
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Some of the TOP50 Supercomputers run OpenPOWER ISA Compatible CPUs (POWER9, etc) - Summit, et. al. Given that and my personal desire to run inference and training on my own OpenPOWER-based systems, it…