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A single GT_CLKx can already clock all the JESD quads without issue, and JESD is a bog-standard transceiver application that is insensitive to skew on that clock.
When clocking from the RTM, the DRTI…
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- On Sayma RTM v1.0 there are 10 unused diff pairs on the RTM connector. On the AMC these connect to: GTP8RX-GTP10RX and SYNCOUT{1,2}1
- On Sayma RTM v2.0 we will completely remove (i.e. not just DNP…
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https://github.com/m-labs/artiq/issues/1083#issuecomment-404447169
AMC is in the post to TechnoSystem.
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Proposal for DAC clocking and synchronization in Sayma v2.0:
- users supply the RTM with a reference clock (frequency `f_ref`) via the front panel (FP) SMA this will be the only supported clocking pa…
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Expectation is that frequencies are left at ```2*self.f``` by end of experiment but observe ```self.f```.
```
import sys
import select
from artiq.experiment import *
class UrukulSet(EnvExpe…
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see mailing list thread:
https://ssl.serverraum.org/lists-archive/artiq/2016-November/001040.html
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* Does the I2C interface to the oscillators really need GC pins? If not (and I'd hope that the I2C cores don't), I'd suggest swapping the SMA_IO lines and the various I2C signals so that the SMA_IOs a…
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# Bug Report
## One-Line Summary
Calling timestamp_mu() for several TTL input channels results in RTIO input overflows, even for a small number of input events.
## Issue Details
Not sure i…
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This just happened:
```
logstash
[INFO] hardware revision 4
[WARN] watchdog reset occurred!
>
> i2cerr
#0 #1 #2 #3 #4 #5 #6 #7
I2C ERR 0 0 0 0 0 0 0 0
>
> version
RFPA v1.4.1 33f0541,…
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device_db containing an entry that is a dictionary without a "type" field leads to an unhanded exception here https://github.com/m-labs/artiq/blob/57caa7b149685585dbc777528d7c86514bcb4874/artiq/device…