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I'm a heavy non-crypto user of `bits.*` and I'm afraid changes like #31229 will effect my performance. One way of keeping crypto people happy and users like me would be to have separate functions for …
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| | |
|--------------------|----|
| Bugzilla Link | [PR43388](https://bugs.llvm.org/show_bug.cgi?id=43388) |
| Status | RESOLVED FIXED |
| Importance | P…
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Hello,
We have been using perlcc for over 15 years.
Thank you so much.
Now, it seems something wrong as below.
It occurs especially after CentOS7.
Please advise.
[root@centos7 ~]# cat …
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I am testing out the new [inline assembly](https://github.com/Amanieu/rfcs/blob/inline-asm/text/0000-inline-asm.md) in Rust nightly. I'm trying to run the RISC-V CSR read instruction, although the act…
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The page https://docs.opentitan.org/ has a TOC-like structure in it, as does https://docs.opentitan.org/doc/ug/. But the contents are manually edited and don't reflect all subsections.
Can we auto…
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Hi everyone
     Iwant to ask some llvm intrinsic::vsetvl questions here, which may not proper to open an issue here? but can't find other places.
     Nowadays I'm bui…
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Running the risc-v benchmark tests were failing while using arrays of large numbers. The compiler creates an assembly which uses Lui instruction that is yet to be implemented in the core.
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I've made some first steps with RISC-V assembly and get some trouble with immediates:
Immediates values are 12 bit wide, but it's not possible without an error-message to assemble instructions like…
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This isn't an RFC-Process-RFC, this is a testing-the-waters-RFC. Last week @sriyerg mentioned that he'd be OK writing in Rust. That begs the question: why don't we just write everything in rust? Th…
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As hardware boards are always hard to get, is there a way to support more QEMU boards?
I just found that "[The xPack QEMU Arm](https://xpack.github.io/qemu-arm/)" has supported one dozen ARM mcu an…