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Since the choice of JTAG port lines is a fixed attribute of the PCB, it makes little sense to implement this by introducing inefficient conditional code into the heavily-optimised FX2 firmware. Instea…
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In current Event B formal model, there are not traceability to the SRS. How to you plan to handle this part?
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During fxReadRegister, the VHDL FSM's STATE_WRITE writes bytes into the FX2's EP8IN FIFO, and decrements wcount (the remaining byte count) for each byte read. Unfortunately it doesn't take the FX2's F…
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Author Name: **Byron Bradley** (@bbradley)
Original Redmine Issue: 226 from https://www.veripool.org
Original Date: 2010-03-19
Original Assignee: Byron Bradley (@bbradley)
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The attached pat…
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Despite changes that should fix Opera issues, 2.36 doesn't work correctly for me in Opera.
I tested 9.27, 9.52, 9.64 and 10.00 under Ubuntu, upload is always interrupted early.
When searching for Oper…