-
From here (https://developer.arm.com/documentation/ddi0406/cb/Appendixes/Barrier-Litmus-Tests/Introduction/Overview-of-memory-consistency) we read that the ARM Cortex-M CPUs generally follow a weak me…
-
@RalfJung asked me to open an issue listing all the useful Arm microcontroller feature flags that could use stabilisation.
These are all listed at https://doc.rust-lang.org/nightly/rustc/platform-sup…
-
#### Description
I've noticed an unexpected kernel panic after a thread exited. I've traced it down to `sched_switch` in `core/sched.c` retrieving an invalid active thread. Inside `sched_task_exi…
-
[ARM Helium](https://www.arm.com/technologies/helium) is a SIMD instruction set extension for Cortex-M microcontrollers, currently the Cortex-M55 and Cortex-M85, with 128-bit width. It is already supp…
-
### Description
I have an ARM Cortex-M binary that utilizes the `cpsid i` and `cpsie i` instructions. Unfortunately angr doesn't seem to simulate these instructions properly.
Based on what I've re…
-
If you use `link_section` to put a singleton in an uninit section, the "has been taken" boolean is also in uninit memory at startup. We read this value which is uninitialized.
https://github.com/ru…
-
Is debugging/programing arm cortex-m devices via swd/jtag possible/implemented/planned?
In the main README there is a lot of mention of debugging and programming microcontrollers via jtag, but not fo…
-
### Problem Statement
I'm sending a chat/completions request to the cortex.cpp endpoints, setting up my daily use tools. The request is fully OpenAI compatible. I always receive an error response s…
-
### Jan version
0.5.4 AppImage
### Describe the Bug
I can't start any local models on my machine after the latest update. The previous version worked fine with various models.
### Steps to Reprodu…
-
This results in a larger binary than is actually necessary, which impacts bootloaders and firmware upgrade.
I tested with a Cortex-M board (`nucleo_f756zg`), although the same might occur on other …