-
Hi,
I was able to port the C code to an Arm Cortex M0. The device does not have a Memory Protection Unit, I was trying to understand the implications for the deferencing issue on NULL pointers but a…
-
we dont't find cortex_m0 folder in ports_module; did threadx support cortex_m0; and how can we do?
-
I am trying to probe information for a Cortex-M0 based MCU using `probe-rs`.
I tried running `probe-rs info` for this but there seems to be some communication issue. I can connect with a JLinkServe…
-
Building for an M0-based board (Adafruit Trinket M0 with ATSAMD21 processor) fails as``std::string`` is referenced but not included. The following error message is produced:
```
In file included fro…
-
![image](https://github.com/azure-rtos/threadx/assets/88314322/11b49904-2697-4951-869c-91678f65a84d)
I try building 'cortex-m3' of files, but no error. I do not know how to read there '.s' files,…
-
**Describe the bug**
When Subscribing to a message using ZBUS if you don't have CONFIG_ASSERT turned on then you only get the first message published to the channel.
**To Reproduce**
Here is a he…
-
**_Reported by Benjamin Walsh:_**
As an ARM kernel developer, I would like to be able to quickly test/sanitize my Cortex-M0/M0+ code.
AFAIK, there is no QEMU Cortex-M0/M0+ model. However, Cortex-M…
-
```
What steps will reproduce the problem?
1. keil uvision
2. #define FIXMATH_NO_64BIT
3. code does not use the available 32 x 32 HW 1cycle multiply
Cortex M0+ does not have the M3 4 multipy, however…
-
```
What steps will reproduce the problem?
1. keil uvision
2. #define FIXMATH_NO_64BIT
3. code does not use the available 32 x 32 HW 1cycle multiply
Cortex M0+ does not have the M3 4 multipy, however…
-
Cortex-M0(+) support is added from commit 46f24eb6af25896113e957d3868e85a1eb0045ad but it is not well tested.
**TODO:**
* Add Cortex-M0(+) examples
* Write in the README about special requitement…