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i built a firmware for ESP32 GENERIC S3 (ESP32-S3-WROOM-1)
python3 make.py esp32 submodules clean mpy_cross BOARD=ESP32_GENERIC_S3 DISPLAY=ili9488 INDEV=xpt2046
by using this command.
binary file c…
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Hi,
I am currently working on a project for esp32 in Rust.
I followed the instructions of https://docs.esp-rs.org/book/tooling/debugging/probe-rs.html.
So I did cargo install probe-rs-tools on cmd…
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Hi,
I'm working on a project on esp32s3, I need to use rustls but I have problems with the ring crate since xtensa is not supported .
I'm using the esp32-idf-template (https://github.com/esp-rs/esp-…
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Background
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Currently, when compiling for ESP IDF 5+, user needs `RUSTFLAGS="--cfg espidf_time64` in their environment.
This is because ESP IDF 5+ migrated to a new GCC toolchain that defi…
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After upgrading the project from:
```
framework = espidf
platform = espressif32@6.6.0
```
to
```
framework = espidf
platform = espressif32@6.7.0
```
We have a crash when calling `esp_core_d…
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Running `cargo check --tests` fails to compile `test` for the [esp-idf-template](https://github.com/esp-rs/esp-idf-template) (tested on mcu esp32-c3, default template options).
```
Compilin…
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Following on from #101 is desirable to temporarily increase CPU clock frequency from 80 to 240 Mhz. Running the CPU at 80 & 160 Mhz appears satisfactory but running it at 240Mhz results in regular reb…
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### The problem
Since few ESPHome versions (or espidf/platformio updates? I didn't change anything related to it) I cannot build my ESP32 firmwares anymore (ESP8266 works fine).
It fails with th…
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I have been trying to run a int8 quantized converted custom keras model on my esp32 cam device but I have been getting discrepancies in outputs. I have so far narrowed it down to a problem with the mu…
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When reviewing the corresponding change to *ring*, https://github.com/briansmith/ring/pull/1944, I noticed that the implementation in `getrandom` for ESPIDF seems really questionable. The ESPIDF docum…