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In https://github.com/apfelaudio/tiliqua/pull/38, I modified a whole bunch of things to add support for the -25K LUT SC variant. This included modifying the PLL configuration to use 2 PLLs instead of …
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I noticed recently during some testing that if I power cycle the whole modular system with an FPGA design saved in flash, if jack input 2 (starting at 0) is inserted before power up (and an example is…
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Initially raised in https://github.com/apfelaudio/eurorack-pmod/discussions/37
There's nothing limiting us to W=16-bit samples (maximum from AK4619 is 32 bits per sample).
We should try some dif…
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This has become requested both on slack and the [forum](https://forum.electro-smith.com/t/request-for-tdm-codec-support-for-the-daisy/2415).
The SAI2 peripheral exposed on the pinout of the Daisy S…
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I'm having trouble getting this to enumerate and I'm running out of things to check.
I've generated a platform description around the colorlight i5 on a breakout with a USB3300 phy (waveshare) with…
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The `pico-ice-v3` board has an RP2040 between the iCE40 and USB port with emulated serial.
The calibration tool needs to be tested using the UART mirror through the RP2040, might need to change the…
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I am installing on macOS x64. after installing VCV Rack, the Rack SDK, and Verilator, when I run `make` I get this error message:
```make
c++ -std=c++14 -std=c++11 -stdlib=libc++ -I/usr/local/Cell…
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I noticed that the 5v power line on the eurorack connector is grounded, is that intentional?
I'd love to be able to power the dev board directly from the eurorack supply? (or is a #badidea?)
Also …
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proto1 looks like this:
![image](https://github.com/apfelaudio/eurorack-pmod/assets/1386830/a960c699-b508-4444-aecb-9dd19fd43dbd)
I will submit a production batch for R3.3 likely in the next mon…
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Some things to change/update for R3.2 hardware:
## R3.2 hardware changes
- **Fix routing error which requires 0 ohm resistor between GND/GNDD**
- Context: R3.1 boards are modified such that L4 …