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## 💡 주제
Computer Architecture - ARM 프로세서
## 📌 TO DO
- [x] Introduction to Computer Structure
- [ ] 프로세서가 뭐예요?
- [ ] RISC, Basis of ARM
- [ ] ARM Processor 기초 자료 조사
- [ ] ARM Security features…
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Morello LLVM now passes varargs and memargs via a buffer pointed to by a capability register (https://git.morello-project.org/morello/llvm-project/-/merge_requests/204). This is needed for library-bas…
dpgao updated
2 months ago
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This issue is a tracker for adding baseline Morello support including a new CPU and platforms. It is just like any other AArch64 CPU/platform **_without_** any CHERI support. Currently, I have Morello…
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R_MORELLO_JUMP_SLOT is under-documented; in reality it is the same as R_AARCH64_JUMP_SLOT, with the linker initially filling in the 64-bit VA in the first half of the slot (pointing at the PLT header)…
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CHERI LLVM [crashes](https://cheri-compiler-explorer.cl.cam.ac.uk/z/c8djG3) on the following (invalid) C code:
```
struct __attribute__((packed)) s {
union {
__intcap c;
}
};
…
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One of our boards just died mid-way through a `pkg64 install` and exclaimed, on its way down,
```
ahcich0: Timeout on slot 30 port 0
ahcich0: is 00000000 cs c0000000 ss 00000000 rs c0000000 tfd 50 …
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Virtfs / p9fs / etc support for the Morello model, Qemu, and so on
gvnn3 updated
2 years ago
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The `addrspace` attribute doesn't change the address space of `alloca`s. For example, compiling the following module using the morello toolchain triggers an assertion failure (`AI->getType()->getPoint…
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```
Assertion failed: (!getType()->isBooleanType() && "unheralded conversion to bool"), function CastConsistency, file /wrkdirs/usr/ports/devel/llvm-morello/work/llvm-project-0d2a3da490a43b0b78161f00…
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Hi,
I am running a morello hybrid qemu with CheriBSD built using cheribuild and when trying to debug using gdb I find that it does not appear to be capability aware. I there something I need to do to…