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I would like to support an instruction similar to the following:
```
:add a0, a0 is opcode_00_16=0b1111111111 & a0
{}
```
The instruction is 16-bits. It references register a0 twice. This fails…
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Hi, when I compile the gdbfuzz, and try to run xtensa sample, I get the some error report.
In detail, when I run the esp-http-server sample, I have the following error:
``` bash
2024-08-30 07:2…
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`sleigh` has some internal mechanism for querying the name associated with a `callother` id. Need to find this API and expose it to rust.
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```
WARN 55 NOP constructors found (SleighCompile)
WARN Use -n switch to list each individually (SleighCompile)
ERROR tms9900.slaspec:195: Table 'SREG' has inconsistent export size; Construct…
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Hi!
I was wondering if there's a specific reason why Image works with Vec instead of using &[u8] directly. In my use case, I provide multiple slices to the lifter to obtain the corresponding pcode,…
chf0x updated
3 weeks ago
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## Task Description
In December, the Van is replaced by Santa's Sleigh with Rapid Rudolph and all the levels become snow levels!
However, the sound effects remain the Van's sound effects, including th…
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**Describe the bug**
Consider the following (the exact values / registers do not relate to the architecture spec, just a minimized repro showing the bug in sleigh compiler):
```
define register off…
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**Describe the bug**
I'm trying to generate some bindings to ghidra sleigh library. In [loadimage.hh file](https://github.com/NationalSecurityAgency/ghidra/blob/a1db2dac166973a381e7a98630bc11901f47d2…
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https://github.com/can1357/retro/tree/master/libretro/src/arch/x86/sema
usa tax dollars already paid for the creation of all lifting of x86 to an IR....
You can have it free.
https://github.…
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**Is your feature request related to a problem? Please describe.**
I'm always frustrated when I try to look at sleigh files to see some examples and the formatting and layout between files are wildly …