Downloading the Reconfigurable Modules (RM) on the PYNQ

[RezaMehrabian]

Hello

I have a question about downloading the Reconfigurable Module. You used Bitstream_Part to download them. What is it? How can we have our own Bitstream_Part?

[AEW2015]

Use this https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline Under video there is a partial_bit.py

https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline/blob/master/video/partial_bit.py

This will not work for the newest pynq release for it uses a different linux driver for FPGA manager and not xdevcfg.

[RezaMehrabian]

Thank you for your reply. Which version should be used?

best regards,

Mohammadreza MEhrabian,

Ph.D. Student, Computer Engineering School of Computing, Informatics and Decision Systems Engineering Arizona State University Tempe, AZ 85281

On Tue, Nov 6, 2018 at 12:56 PM Andrew E Wilson notifications@github.com wrote:

Use this https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline Under video there is a partial_bit.py

https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline/blob/master/video/partial_bit.py

This will not work for the newest pynq release for it uses a different linux driver for FPGA manager and not xdevcfg.

— You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub https://github.com/AEW2015/PYNQ_PR_Overlay/issues/2#issuecomment-436387455, or mute the thread https://github.com/notifications/unsubscribe-auth/AXpiDKDpikaxFcF0rt5kd2Ff5I6b8z3yks5usel5gaJpZM4YREgo .

[RezaMehrabian]

Thank you for your reply. Which version of the image should be used?

[AEW2015]

Pynq 2.1 i think

On Thu, Nov 29, 2018, 10:39 AM Martin20 notifications@github.com wrote:

Thank you for your reply. Which version should be used?

best regards,

Mohammadreza MEhrabian,

Ph.D. Student, Computer Engineering School of Computing, Informatics and Decision Systems Engineering Arizona State University Tempe, AZ 85281

On Tue, Nov 6, 2018 at 12:56 PM Andrew E Wilson notifications@github.com wrote:

Use this https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline Under video there is a partial_bit.py

https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline/blob/master/video/partial_bit.py

This will not work for the newest pynq release for it uses a different linux driver for FPGA manager and not xdevcfg.

— You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub < https://github.com/AEW2015/PYNQ_PR_Overlay/issues/2#issuecomment-436387455 , or mute the thread < https://github.com/notifications/unsubscribe-auth/AXpiDKDpikaxFcF0rt5kd2Ff5I6b8z3yks5usel5gaJpZM4YREgo

.

— You are receiving this because you commented.

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[RezaMehrabian]

I use 2.1. all codes in partial_bit.py works except with open(BS_XDEVCFG, 'wb') as f: f.write(buf) after running this, the system halts. Could you let me know what is the solution? I run each line in that file line by line.

[AEW2015]

So the system is doing the partial reconfiguration, but partial bitstream includes an axi lite interface?. If so you need to decouple it in the static design during the partial reconfiguration.

AEW

On Fri, Nov 30, 2018, 2:10 PM Martin20 notifications@github.com wrote:

I use 2.1. all codes in partial_bit.py works except with open(BS_XDEVCFG, 'wb') as f: f.write(buf) after running this, the system halts. Could you let me know what is the solution? I run each line in that file line by line.

— You are receiving this because you commented.

Reply to this email directly, view it on GitHub https://github.com/AEW2015/PYNQ_PR_Overlay/issues/2#issuecomment-443340551, or mute the thread https://github.com/notifications/unsubscribe-auth/AMIb-vdM-fUEpbA6XOz3YLx006slef2sks5u0Z7YgaJpZM4YREgo .

[RezaMehrabian]

It is partial reconfiguration without axi lite interface. It is a very very simple circuit. Assume I want to show one on the built-in LEDs on the board and then reconfigure it to show 3. just using two bits. I design the partial reconfiguration based on the attached tutorial.

I explained everything about this simple project in the attached pdf file.

best regards,

Mohammadreza MEhrabian,

Ph.D. Student, Computer Engineering School of Computing, Informatics and Decision Systems Engineering Arizona State University Tempe, AZ 85281

On Fri, Nov 30, 2018 at 2:17 PM Andrew E Wilson notifications@github.com wrote:

So the system is doing the partial reconfiguration, but partial bitstream includes an axi lite interface?. If so you need to decouple it in the static design during the partial reconfiguration.

AEW

On Fri, Nov 30, 2018, 2:10 PM Martin20 notifications@github.com wrote:

I use 2.1. all codes in partial_bit.py works except with open(BS_XDEVCFG, 'wb') as f: f.write(buf) after running this, the system halts. Could you let me know what is the solution? I run each line in that file line by line.

— You are receiving this because you commented.

Reply to this email directly, view it on GitHub < https://github.com/AEW2015/PYNQ_PR_Overlay/issues/2#issuecomment-443340551 , or mute the thread < https://github.com/notifications/unsubscribe-auth/AMIb-vdM-fUEpbA6XOz3YLx006slef2sks5u0Z7YgaJpZM4YREgo

.

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[RezaMehrabian]

I sent an email containing the explanation files, If you have nt received them, please let me know.