Closed Sujana-M closed 1 year ago
Hi @Sujana-M Could you add more information about why we need to do this? Is there a rule in BSA spec for this? What issue will be fixed by this change?
Hi @sunnywang-arm , In individual tests we are enabling and disabling these bits only for those devices that are added in the PCIe info table. If only a legacy PCIe device is connected to a RP, this device will not be part of the PCIe info table and doing checks on RP, like P/NP range, which access the memory of the EP connected to the RP, Then these bits will not be set in the EP as they are not in the PCIe info table. Hence this check is needed.
Had an offline discussion with Sujana.
For doing memory space access tests (est_os_p004.c and test_os_p005.c) with RPs, we need to enable BME (Bus Master Enable) & MSE (Memory Space Access), especially for the EPs connected to the RP. If we don't enable EP's BME & MSE, we will run into failure when testing its connected RP. However, we only enable BME & MSE for the devices in PCIe info table that doesn't include the Legacy devices. Therefore, we need to find a place to enable Legacy EP devices' BME & MSE bits so that we won't run the failure with its connected RP.
Therefore, now the code change looks good to me. Thanks for offline clarifying this, @Sujana-M!