Update test "824 : Check Device capabilities reg rule" to NOT check the value in the PCI express capability structure registers

[sunnywang-arm]

The test 824 is to check the rule PCI_IN_05 below in BSA spec.

• PCI_IN_05: Root Port must appear as a PCI-PCI bridge to software (See Section 7.1 [1]). This implies that Root Port: must have all registers that are part of the Type 1 header, as specified in PCIe specification (See Section 7.5.1.3 [1]). must have all the capabilities required by PCIe specification for a Root Port. This includes the PCI express capability structure (See Section 7.5.3 [1]). * registers must follow the access attributes (RW/RO etc) specified in the PCIe specification

However, the PCI_IN_05 doesn’t mention that we need to check the values in the PCI express capability structure registers, so this looks to me like a test suite issue. In other words, the test 824 now checks both value and access attributes, so we need to remove the check for the value from the test. What do you guys think?

[gowthamsiddarthd]

Hi @sunnywang-arm,

As the rule mentioned, if we check the PCIe specification section 7.5.3, and read the register bit field descriptions, it clearly mentions that

For Bit[8:6] For Functions other than Endpoints, this field is Reserved and must be hardwired to 000b.

For Bit[11:9] For Functions other than Endpoints, this field is Reserved and must be hardwired to 000b.

For Bit[28:28] This bit applies to Endpoints only. For all other Function types this bit must be hardwired to 0b.

The BSA ACS only checks for EPs and RPs and not other device types such as RCiEPs. Hence there should be no failure in RCiEP devices in BSA ACS.

If this is about SBSA ACS, section F.3.2 in the spec clearly mentions that this bit must be hardcoded to 0. Endpoint L0s acceptable latency : RCEC and RCiEP: Hardwired to 0

Also section G.3.9 mentions as Endpoint L0s acceptable latency: i-EP Root Port and Endpoint: Hardwired to 0.

So, I believe this check is valid for RCiEPs.

Eventhough, the BSA spec doesn’t mention about the values of RootPort, the PCIe spec clearly mentions that RP should be 0.

There are on going discussions on relaxing this rule in BSA specification. Once that is reflected in the specification, the ACS will also be updated to reflect the same.

Regards, Gowtham ACS Team.