Closed quic-pansing closed 1 day ago
Hello @quic-pansing,
Yes the changes has been verified at our end on couple of systems. Can you please share the exception logs to determine which register access has cause this issue. Also are you run the ACS on top of baremetal system or edk2 based system.
Thanks, ACS team
thanks @chetan-rathore This is EDK2 based system. I believe this mrs x0, erridr_el1 this is creating "unhandled synchronous exception"
thanks @quic-pansing for the information. We will analyze more on this register access.
Hello Pankaj,
Access to this register is permitted only if FEAT_RAS is implemented. The ACS attempts to access the register solely when FEAT_RAS is present.
Additionally, access to Error Record registers from lower exception levels (such as EL2) requires Disabling the SCR_EL3.TERR bit to not trap the access. Please confirm that the relevant configuration is enabled.
Regards, ACS Team
https://github.com/ARM-software/bsa-acs/commit/c266c563c71ce98f5380d6adfcb7785232bed53a with above change we see panic while running PE test. is chage are correct and validated before test
BSA Architecture Compliance Suite Version 1.0.8
Starting tests with print level : 3
Creating Platform Information Tables PE_INFO: Number of PE detected : 8 PCIE_INFO: Number of ECAM regions : 0 SMMU_INFO: Number of SMMU CTRL : 0 Peripheral: Num of USB controllers : 0 Peripheral: Num of SATA controllers : 0 Peripheral: Num of UART controllers : 0
Operating System View: 1 : Check Arch symmetry across PE unhandled synchronous exception