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ARM-software / ebbr

Embedded Base Boot Requirements Specification
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Refresh reference for RISC-V hypervisor extension #101

Closed vstehle closed 1 year ago

vstehle commented 1 year ago

The RISC-V Hypervisor Extension is now defined as part of RISC-V Privileged Architecture specification. Update EBBR accordingly.

Fixes: #100 Signed-off-by: Vincent Stehlé vincent.stehle@arm.com Cc: Heinrich Schuchardt heinrich.schuchardt@canonical.com

vstehle commented 1 year ago

Hi @xypron, could you please have a look at this change and let me know how you like it? Thanks!

xypron commented 1 year ago

Thanks @vstehle for looking into this.

The link to the privileged spec should be https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf to relate to this specific release or you could link to https://riscv.org/technical/specifications/

Could we additionally make this change:

old Any platform with hypervisor extension enabled most likely to boot UEFI at HS mode, new Any platform supporting the hypervisor extension enabled most likely will boot UEFI at HS mode,/