Add RISC-V architectural requirements

ARM-software / ebbr

Embedded Base Boot Requirements Specification

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Add RISC-V architectural requirements #49

Closed xypron closed 4 years ago

xypron commented 4 years ago

The EBBR is applicable independent of architecture but architectural requirements have only been described for ARM. Here is a list of ideas:

passing of booting hart and device-tree to next stage
privilege levels
SBI HSM extension
reference to booting section of RISC-V Platform specification

Cc. @avpatel, @lbmeng

glikely commented 4 years ago

Discussed at 2020.08.31 meeting.

Atish: There is no booting spec for risc-v. Would like to add text in the multiprocessor section; and can change it to a reference to an external document at a later date.

Grant: am happy to have risc-v requirements added to document.

Waiting on patches!

glikely commented 4 years ago

I'm inclined to close this issue as I cannot think of a good reason to keep it open. The lack of RISC-V requirements isn't a defect of the document, but rather RISC-V details simply haven't been submitted yet. It isn't something that needs to be tracked with an issue.