ARM-software / sbsa-acs

ARM Enterprise: SBSA Architecture Compliance Suite
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test 861: Received exception of type: 0 #327

Closed hrw closed 1 year ago

hrw commented 1 year ago

When I run "sbsa.efi -l 7 -v 1" I get this:

 861 : Check RootPort P&NP Memory Access
       START
       BDF - 0x100
       BDF - 0x300
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0

And it loops here.

"git bisect" ended here:

11:27 marcin@applejack:sbsa-acs$ git bisect bad
ae6d9fc7e6ed3d8cb80e1aba4ef0f0d26104ec5c is the first bad commit
commit ae6d9fc7e6ed3d8cb80e1aba4ef0f0d26104ec5c
Author: Srikar Josyula <srikar.josyula@arm.com>
Date:   Fri Apr 14 00:46:39 2023 +0530

    S_L4PCI_2 test moved to SBSA L4

    - Fix for issues #297 and #317.
    - Moved test_p062 to L4 of SBSA under TEST_ID 601
    - Included all device types in PCIe BDF table.
    - PCIe test rule mapping fixes.
    - PCIe BDF table used to recognise exercisers also.

    Signed-off-by: Srikar Josyula <srikar.josyula@arm.com>
chetan-rathore commented 1 year ago

Hi @hrw,

We will check the issue at our end, can you please share the platform on which this issue is observed.

Thanks, ACS team

hrw commented 1 year ago

I use boot-sbsa-ref.sh script from my repo.

QEMU 8.0.0 with up-to-date EDK2 used.

If I run SBSA ACS from before this commit it works fine.

Sujana-M commented 1 year ago

Hi @hrw

I tried reproducing the issue at my end by adding the PCIe hierarchy as mentioned in https://github.com/hrw/sbsa-ref-status/blob/main/boot-sbsa-ref.sh. I'm facing the below issue while doing so

"qemu-system-aarch64: -device pcie-root-port,id=root_port_1.2,chassis=1,slot=2: MSI-X is not supported by interrupt controller"

I am able to add devices directly to the Host bridge but unable to add a RP. Could you please share if any config was changed at your end to enable the same.

Platform used QEMU 8.0.0 (Downloaded from https://www.qemu.org/download/)  and latest edk2 (https://github.com/tianocore/edk2).

Please Note: The test did not enter a loop before the commit because prior to this commit SBSA was run on RCiEP, RCEC, iEP_EP and iEP_RP. As a result, the test is skipped as in https://github.com/hrw/sbsa-ref-status/blob/main/status-sbsa.yml#L748.  Since the Rule "S_PCIe_02" needs to be checked for all PCIe devices, this test now checks for RP's as well.

Request you to share the logs of QEMU from your end with -v 1 

Thanks, ACS Team

hrw commented 1 year ago

Will reply after Linaro Connect and provide requires patches.

hrw commented 1 year ago

QEMU code/patches: https://github.com/hrw/fork-qemu/releases/tag/hrw-2023.05.04

EDK2 platforms code/patches: https://github.com/hrw/fork-edk2-platforms/tree/hrw-2023.05.04

Those branches have some WIP code to add ITS/SMMU stuff.

hrw commented 1 year ago

log:

Shell> pci
   Seg  Bus  Dev  Func
   ---  ---  ---  ----
    00   00   00    00 ==> Bridge Device - Host/PCI bridge
             Vendor 1B36 Device 0008 Prog Interface 0
    00   00   01    00 ==> Network Controller - Ethernet controller
             Vendor 8086 Device 10D3 Prog Interface 0
    00   00   02    00 ==> Display Controller - VGA/8514 controller
             Vendor 1234 Device 1111 Prog Interface 0
    00   00   03    00 ==> Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   00   04    00 ==> Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   00   05    00 ==> Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   00   06    00 ==> Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000C Prog Interface 0
    00   01   00    00 ==> Serial Bus Controllers - USB
             Vendor 1B36 Device 000D Prog Interface 30
    00   02   00    00 ==> Display Controller - Other display controller
             Vendor 1234 Device 1111 Prog Interface 0
    00   03   00    00 ==> Network Controller - Ethernet controller
             Vendor 8086 Device 10D3 Prog Interface 0
    00   04   00    00 ==> Bridge Device - PCI/PCI bridge
             Vendor 1B36 Device 000E Prog Interface 0
    00   05   08    00 ==> Pre 2.0 device - UNDEFINED
             Vendor 1AF4 Device 1005 Prog Interface 0
Shell> fs0:sbsa.efi -v 1 -l 7

 SBSA Architecture Compliance Suite 
    Version 7.1.1  

 Starting tests for level  7 (Print level is  1)

 Creating Platform Information Tables 
 Using SMC as PSCI conduit
 MADT is at FC0EF598 and length is 1A8 
  Flags 1 
  PE Enabled 1, Online Capable 0
 MPIDR 0 PE num 0 
  Flags 1 
  PE Enabled 1, Online Capable 0
 MPIDR 1 PE num 1 
  Flags 1 
  PE Enabled 1, Online Capable 0
 MPIDR 2 PE num 2 
  Flags 1 
  PE Enabled 1, Online Capable 0
 MPIDR 3 PE num 3 
 PE_INFO: Number of PE detected       :    4 
 MADT is at FC0EF598 and length is 1A8 
 GICH base 2C010000 
 GICH base 2C010000 
 GICH base 2C010000 
 GICH base 2C010000 
 GIC DIS base 40060000 
 GIC RD base Structure 40080000 
 GIC ITS base 44081000 
 GIC ITS ID0 
 GIC_INFO: Number of GICD             :    1 
 GIC_INFO: Number of ITS              :    1 
 GTDT is at FC0EFD18 and length is 84 
 TIMER_INFO: Number of system timers  :    0 
 Watchdog base = 0x50011000 INTID = 0x30 
 WATCHDOG_INFO: Number of Watchdogs   :    1 
PPTT table found at 0x100FC0EF818 with length 0xF0

Cache info * Index 0 *
  Offset:                  0x38
  Type:                    0x0
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 1 *
  Offset:                  0x68
  Type:                    0x2
  Cache ID:                0x1C00
  Size:                    0x80000
  Next level index:        -1
  Private flag:            0x1

Cache info * Index 2 *
  Offset:                  0x50
  Type:                    0x1
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 3 *
  Offset:                  0x38
  Type:                    0x0
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 4 *
  Offset:                  0x50
  Type:                    0x1
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 5 *
  Offset:                  0x38
  Type:                    0x0
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 6 *
  Offset:                  0x50
  Type:                    0x1
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 7 *
  Offset:                  0x38
  Type:                    0x0
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

Cache info * Index 8 *
  Offset:                  0x50
  Type:                    0x1
  Cache ID:                0x1801
  Size:                    0x8000
  Next level index:        1
  Private flag:            0x1

PE level one cache index info
PE Index * 0 *
  Level 1 Cache index(s) : 0, 2,

PE Index * 1 *
  Level 1 Cache index(s) : 3, 4,

PE Index * 2 *
  Level 1 Cache index(s) : 5, 6,

PE Index * 3 *
  Level 1 Cache index(s) : 7, 8,
 CACHE_INFO: Number of cache nodes    :    9
 MPAM table not found
 MPAM INFO: Number of MSC nodes       :    0 
 HMAT ACPI table not found
 SRAT not found 

 Allocating memory for RAS2 info table RAS2 ACPI table not found
 RAS2_INFO: Number of RAS2 entries    :    0 
 RAS2_INFO: Num of RAS2 memory entries:    0 
 PCIE_INFO: Number of ECAM regions    :    1 
   Dev bdf 0x000100 DP type 0x200   RP bdf 0xFFFFFFFF
   Dev bdf 0x000300 DP type 0x010   RP bdf 0x000300
   Dev bdf 0x000400 DP type 0x010   RP bdf 0x000400
   Dev bdf 0x000500 DP type 0x010   RP bdf 0x000500
   Dev bdf 0x000600 DP type 0x010   RP bdf 0x000600
   Dev bdf 0x010000 DP type 0x001   RP bdf 0x000300
   Dev bdf 0x020000 DP type 0x001   RP bdf 0x000400
   Dev bdf 0x030000 DP type 0x001   RP bdf 0x000500
   Dev bdf 0x040000 DP type 0x080   RP bdf 0x000600
 PCIE_INFO: Number of BDFs found      :    9
 PCIE_INFO: Number of RCiEP           :    1 
 PCIE_INFO: Number of RCEC            :    0 
 PCIE_INFO: Number of EP              :    3 
 PCIE_INFO: Number of RP              :    4 
 PCIE_INFO: Number of iEP_EP          :    0 
 PCIE_INFO: Number of iEP_RP          :    0 

  ECAM 0:  Base 0xF0000000
  BDF: 0x100
  Seg: 0x0, Bus: 0x00, Dev: 0x01, Func: 0x0, Dev ID: 0x10D3, Vendor ID: 0x8086
  BDF: 0x300
  Seg: 0x0, Bus: 0x00, Dev: 0x03, Func: 0x0, Dev ID: 0x000C, Vendor ID: 0x1B36
  BDF: 0x400
  Seg: 0x0, Bus: 0x00, Dev: 0x04, Func: 0x0, Dev ID: 0x000C, Vendor ID: 0x1B36
  BDF: 0x500
  Seg: 0x0, Bus: 0x00, Dev: 0x05, Func: 0x0, Dev ID: 0x000C, Vendor ID: 0x1B36
  BDF: 0x600
  Seg: 0x0, Bus: 0x00, Dev: 0x06, Func: 0x0, Dev ID: 0x000C, Vendor ID: 0x1B36
  BDF: 0x10000
  Seg: 0x0, Bus: 0x01, Dev: 0x00, Func: 0x0, Dev ID: 0x000D, Vendor ID: 0x1B36
  BDF: 0x20000
  Seg: 0x0, Bus: 0x02, Dev: 0x00, Func: 0x0, Dev ID: 0x1111, Vendor ID: 0x1234
  BDF: 0x30000
  Seg: 0x0, Bus: 0x03, Dev: 0x00, Func: 0x0, Dev ID: 0x10D3, Vendor ID: 0x8086
  BDF: 0x40000
  Seg: 0x0, Bus: 0x04, Dev: 0x00, Func: 0x0, Dev ID: 0x000E, Vendor ID: 0x1B36
 IORT node offset:30, type: 0
 IORT node offset:48, type: 4
 IORT node offset:30, type: 0
 IORT node offset:A0, type: 2
 IORT node offset:48, type: 4
 Number of IOVIRT blocks = 3

 ITS Group: Num ITS:0
  ITS ID : 0
 SMMU: Major Rev:3 Base Address:0x60050000
 Number of ID Mappings:1
  input_base:0x0 id_count:0xFFFF
  output_base:0x0 output ref:0x18

 Root Complex: PCI segment number:0
 Number of ID Mappings:1
  input_base:0x0 id_count:0xFFFF
  output_base:0x0 output ref:0x144

 SMMU_INFO: Number of SMMU CTRL       :    1 
 000.00.00 class_code = 0 6
 000.00.12 class_code = 6 1
 000.01.01 class_code = 0 2
 000.02.02 class_code = 0 3
 000.03.03 class_code = 4 6
 000.04.05 class_code = 4 6
 000.05.07 class_code = 4 6
 000.06.09 class_code = 4 6
 001.00.04 class_code = 3 12
 Found a USB controller 82400004 
 005.08.11 class_code = 255 0
 000.00.00 class_code = 0 6
 000.00.12 class_code = 6 1
 Found a SATA controller 60100000 
 000.01.01 class_code = 0 2
 000.02.02 class_code = 0 3
 000.03.03 class_code = 4 6
 000.04.05 class_code = 4 6
 000.05.07 class_code = 4 6
 000.06.09 class_code = 4 6
 005.08.11 class_code = 255 0
 Peripheral: Num of USB controllers   :    1 
 Peripheral: Num of SATA controllers  :    1 
 Peripheral: Num of UART controllers  :    1 

 BDF is 0
 Class code is 6000000
 BDF is 100
 Class code is 2000000
 BDF is 200
 Class code is 3000002
 BDF is 300
 Class code is 6040000
 BDF is 400
 Class code is 6040000
 BDF is 500
 Class code is 6040000
 BDF is 600
 Class code is 6040000
 BDF is 10000
 Class code is C033001
 BDF is 20000
 Class code is 3800002
 BDF is 30000
 Class code is 2000000
 BDF is 40000
 Class code is 6040000
 BDF is 50800
 Class code is FF0000 Peripheral: Num of Network ctrl      :    2 
 Peripheral: Num of Storage ctrl      :    0 
 Peripheral: Num of Display ctrl      :    2 
 Reserved region of type 7 [0x10000000000, 0x100FBD77000]
 Reserved region of type 1 [0x100FBD77000, 0x100FBEE0000]
 Reserved region of type 5 [0x100FBEE0000, 0x100FBF60000]
 Reserved region of type 6 [0x100FBF60000, 0x100FC000000]
 Reserved region of type 4 [0x100FC000000, 0x100FC020000]
 Reserved region of type 5 [0x100FC020000, 0x100FC0B0000]
 Reserved region of type 9 [0x100FC0B0000, 0x100FC0F0000]
 Reserved region of type 7 [0x100FC0F0000, 0x100FE0E1000]
 Reserved region of type 4 [0x100FE0E1000, 0x100FE1F7000]
 Reserved region of type 7 [0x100FE1F7000, 0x100FE1F8000]
 Reserved region of type 4 [0x100FE1F8000, 0x100FEFE4000]
 Reserved region of type 7 [0x100FEFE4000, 0x100FF30E000]
 Reserved region of type 3 [0x100FF30E000, 0x100FF5C0000]
 Reserved region of type 5 [0x100FF5C0000, 0x100FF750000]
 Reserved region of type 6 [0x100FF750000, 0x100FF9A0000]
 Reserved region of type 7 [0x100FF9A0000, 0x100FF9BB000]
 Reserved region of type 4 [0x100FF9BB000, 0x100FF9DD000]
 Reserved region of type 3 [0x100FF9DD000, 0x100FFA14000]
 Reserved region of type 4 [0x100FFA14000, 0x100FFFE8000]
 Reserved region of type 3 [0x100FFFE8000, 0x100FFFF8000]
 Reserved region of type 4 [0x100FFFF8000, 0x10100000000]
 Reserved region of type 11 [0x10000000, 0x104C0000]
 Reserved region of type 11 [0x60010000, 0x60011000]
 APMT table not found
 PMU_INFO: Number of PMU units        :    0
 AEST table not found
 RAS_INFO: Number of RAS nodes        :    0 
 Shared memory is 100FE1F8A98 

      ***  Starting PE tests ***  
   1 : Check PE Granule Support          
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L3PE_01
                                  : Result:  PASS 
       END  

   2 : Check for 16-bit ASID support     
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L3PE_02
                                  : Result:  PASS 
       END  

   3 : Check AARCH64 implementation      
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L3PE_03
                                  : Result:  PASS 
       END  

   4 : Check FEAT_LPA Requirements       
       START  
 Peripheral 2002
 Peripheral 2001
 Peripheral 2000
       S_L3PE_04
                                  : Result:  PASS 
       END  

   5 : Check for RAS extension           
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L4PE_01
                                  : Result:  PASS 
       END  

   6 : Check DC CVAP support             
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L4PE_02
       Checkpoint --  2                  : Result:  SKIPPED 
       END  

   7 : Check for 16-Bit VMID             
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L4PE_03
                                  : Result:  PASS 
       END  

   8 : Check for Virtual host extensions 
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L4PE_04
                                  : Result:  PASS 
       END  

   9 : Support Page table map size change
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L5PE_01
                                  : Result:  PASS 
       END  

  10 : Check for pointer signing         
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L5PE_02
                                  : Result:  PASS 
       END  

  11 : Check Activity monitors extension 
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       S_L5PE_04
       Checkpoint --  1                  : Result:  FAIL 
       END  

  12 : Check for SHA3 and SHA512 support 
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L5PE_05
                                  : Result:  PASS 
       END  

  13 : Stage 2 control of mem and cache  
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L5PE_06
                                  : Result:  PASS 
       END  

  14 : Check for nested virtualization   
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       S_L5PE_07
       Checkpoint --  1                  : Result:  FAIL 
       END  

  15 : Check MPAM PE Requirements        
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_MPAM_PE
       Checkpoint --  2                  : Result:  SKIPPED 
       END  

  16 : Check MPAM LLC Requirements       
       START  
       cache 1 has invalid cache_identifier
       LLC invalid in PPTT
       Failed on PE -    0 for Level=  7 
       S_MPAM_PE
       Checkpoint --  2                  : Result:  FAIL 
       END  

  17 : Check SPE if implemented          
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       B_PE_17
       Checkpoint --  1                  : Result:  FAIL 
       END  

  18 : Check Branch Target Support       
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L6PE_02
                                  : Result:  PASS 
       END  

  19 : Check Protect Against Timing Fault
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L6PE_03
                                  : Result:  PASS 
       END  

  20 : Check PMU Version Support         
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L6PE_04
                                  : Result:  PASS 
       END  

  21 : Check AccessFlag DirtyState Update
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L6PE_05
                                  : Result:  PASS 
       END  

  22 : Check Enhanced Virtualization Trap
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L6PE_06
                                  : Result:  PASS 
       END  

  23 : Check Speculation Restriction     
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       B_SEC_01
                                  : Result:  PASS 
       END  

  24 : Check Speculative Str Bypass Safe 
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       B_SEC_02
                                  : Result:  PASS 
       END  

  25 : Check PEs Impl CSDB,SSBB,PSSBB    
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       B_SEC_03
                                  : Result:  PASS 
       END  

  26 : Check PEs Implement SB Barrier    
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       B_SEC_04
                                  : Result:  PASS 
       END  

  27 : Check PE Impl CFP,DVP,CPP RCTX    
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       B_SEC_05
                                  : Result:  PASS 
       END  

  28 : Check Fine Grain Trap Support     
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L7PE_01
                                  : Result:  PASS 
       END  

  29 : Check for ECV support             
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       S_L7PE_02
       Checkpoint --  1                  : Result:  FAIL 
       END  

  30 : Check for AMU Support             
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       S_L7PE_03
       Checkpoint --  1                  : Result:  FAIL 
       END  

  31 : Checks ASIMD Int8 matrix multiplc 
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L7PE_04
                                  : Result:  PASS 
       END  

  32 : Check for BFLOAT16 extension      
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L7PE_05
                                  : Result:  PASS 
       END  

  33 : Check for EnhancedPAC2 and FPAC   
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       S_L7PE_06
       Checkpoint --  1                  : Result:  FAIL 
       END  

  34 : Check for SVE Int8 matrix multiplc
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L7PE_07
                                  : Result:  PASS 
       END  

  35 : Check for data gathering hint     
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L7PE_08
                                  : Result:  PASS 
       END  

  36 : Check WFE Fine tune delay feature 
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       Failed on PE -    0 for Level=  7 
       S_L7PE_09
       Checkpoint --  1                  : Result:  FAIL 
       END  

  37 : Check for enhanced PAN feature    
       START  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       PSCI_CPU_ON: success  
       S_L7PE_10
                                  : Result:  PASS 
       END  

      One or more PE tests failed or were skipped.

      ***  Starting Memory tests ***  
 101 : Check peripherals addr 64Kb apart 
       START  
 Peripheral 2000
 Peripheral 2001
   addr of Peripheral 1 is  82400004
   addr of Peripheral 2 is  60100000
 Peripheral 2000
 Peripheral 2002
   addr of Peripheral 1 is  82400004
   addr of Peripheral 2 is  60000000
 Peripheral 2001
 Peripheral 2002
   addr of Peripheral 1 is  60100000
   addr of Peripheral 2 is  60000000
       S_L3MM_01, S_L3MM_02
                                  : Result:  PASS 
       END  

      All Memory tests passed.

      ***  Starting GIC tests ***  
 201 : Check GIC version                 
       START  
       gic version from ACPI table = 3 
       Received GIC version =    3      
       S_L3GI_01
                                  : Result:  PASS 
       END  

 202 : Check Reserved PPI Assignments    
       START  
       S_L5PP_01
                                  : Result:  PASS 
       END  

      All GIC tests passed.

      *** Starting SMMU  tests ***  
 301 : Check SMMU Version                
       START  
       Level 7 systems must be compliant with the Arm SMMUv3.2 or higher  
       Failed on PE -    0 for Level=  7 
       S_L3SM_01 
       Checkpoint --  2                  : Result:  FAIL 
       END  

      SMMU Version Not Compliant, Skipping Remaining SMMU Tests

      *** Starting Watchdog tests ***  
 701 : Check NS Watchdog Revision        
       START  
       Found 1 watchdogs in ACPI table 
      Watchdog CTRL base is  50011000      
       S_L6WD_01
                                  : Result:  PASS 
       END  

      All Watchdog tests passed.

      *** Starting PCIe tests ***  
 601 : Check EA Capability               
       START  
       BDF - 0x100
       BDF - 0x300
       BDF - 0x400
       BDF - 0x500
       BDF - 0x600
       BDF - 0x10000
       BDF - 0x20000
       BDF - 0x30000
       BDF - 0x40000
       S_L4PCI_2
                                  : Result:  PASS 
       END  

 801 : Check ECAM Presence               
       START  
       PCI_IN_01
                                  : Result:  PASS 
       END  

 803 : Check ECAM Memory accessibility   
       START  
       PCIe Cap Structure not found for BDF 0x0
       PCIe Cap Structure not found for BDF 0x200
       PCIe Cap Structure not found for BDF 0x50800
       PCI_IN_02
                                  : Result:  PASS 
       END  

 820 : Check Type 0/1 common config rules
       START  
       Number of bit-field entries to check 12
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       RE_REG_1, IE_REG_1, IE_REG_3
                                  : Result:  PASS 
       END  

 821 : Check Type 0 config header rules  
       START  
       Number of bit-field entries to check 3
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       RE_REG_1, IE_REG_1
                                  : Result:  PASS 
       END  

 822 : Check Type 1 config header rules  
       START  
       Number of bit-field entries to check 10
       IE_REG_3
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 823 : Check PCIe capability rules       
       START  
       Number of bit-field entries to check 1
       IE_REG_4
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 824 : Check Device capabilites reg rules
       START  
       Number of bit-field entries to check 8
       BDF 0x100 : PASS
       BDF 0x100 : ETFS value mismatch: 0x0 instead of 0x1
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       Failed on PE -    0 for Level=  7 
       RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4
       Checkpoint --  1                  : Result:  FAIL 
       END  

 825 : Check Device Control register rule
       START  
       Number of bit-field entries to check 4
       BDF 0x100 : WARNING PFE attribute mismatch: 0x200 instead of 0x0
       BDF 0x100 : WARNING APPE attribute mismatch: 0x400 instead of 0x0
       RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4
                                  : Result:  PASS 
       END  

 826 : Check Device cap 2 register rules 
       START  
       Number of bit-field entries to check 16
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       BDF 0x100 : WARNING EFFS value mismatch: 0x0 instead of 0x1
       RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4
                                  : Result:  PASS 
       END  

 827 : Check Device control 2 reg rules  
       START  
       Number of bit-field entries to check 5
       BDF 0x100 : AFI attribute mismatch: 0x2400020 instead of 0x2400000
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       Failed on PE -    0 for Level=  7 
       RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4
       Checkpoint --  1                  : Result:  FAIL 
       END  

 828 : Check Power management cap rules  
       START  
       Number of bit-field entries to check 2
       BDF 0x100 : PASS
       BDF 0x100 : PASS
       RE_REG_2, IE_REG_5
                                  : Result:  PASS 
       END  

 829 : Check Power management/status rule
       START  
       Number of bit-field entries to check 2
       BDF 0x100 : WARNING Data Select attribute mismatch: 0x1E00 instead of 0x0
       BDF 0x100 : PASS
       RE_REG_2, IE_REG_5
                                  : Result:  PASS 
       END  

 830 : Check Cmd Reg memory space enable 
       START  
       tbl_index 0
       BDF - 0x100       Bar Base 82560000       bar_data FFFFFFFF 
       tbl_index 1
       tbl_index 2
       tbl_index 3
       tbl_index 4
       tbl_index 5
       tbl_index 6
       tbl_index 7
       tbl_index 8
       RE_REG_1, IE_REG_1, IE_REG_3
                                  : Result:  PASS 
       END  

 831 : Check Type0/1 BIST Register rule  
       START  
       RE_REG_1, IE_REG_1, IE_REG_3
                                  : Result:  PASS 
       END  

 832 : Check HDR CapPtr Register rule    
       START  
       BDF - 0x100
       RE_REG_1, IE_REG_1, IE_REG_3
                                  : Result:  PASS 
       END  

 833 : Check Max payload size supported  
       START  
       BDF - 0x100
       RE_REC_1, IE_REG_2, IE_REG_4
                                  : Result:  PASS 
       END  

 834 : Check BAR memory space & Type rule
       START  
       BDF - 0x100 
       HDR TYPE 0x0 
       MAX BARS 0x6 
       BDF 0x0 Not MMIO
       Failed on PE -    0 for Level=  7 
       RE_BAR_3
       Checkpoint --  1                  : Result:  FAIL 
       END  

 835 : Check Function level reset rule   
       START  
       No RCiEP/iEP_EP/ EP with FLR Cap found. Skipping test
       RE_RST_1, PCI_SM_02
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 836 : Check ARI forwarding support rule 
       START  
       No iEP found with ARI Capability Support. Skipping test
       PCI_IN_17
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 837 : Check OBFF supported rule         
       START  
       No iEP_EP type device found. Skipping test
       IE_REG_2
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 838 : Check CTRS and CTDS rule          
       START  
       No iEP_RP type device found. Skipping test
       IE_REG_4
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 839 : Check i-EP atomicop rule          
       START  
       No iEP_EP type device found. Skipping test
       IE_REG_2
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 841 : Check MSI and MSI-X support rule  
       START  
       BDF - 0x100 int pin value 1 MSI cap 0 MSIX cap 0
       RE_INT_1, IE_INT_1
                                  : Result:  PASS 
       END  

 842 : Check Power Management rules      
       START  
       BDF - 0x100
       RE_PWR_1
                                  : Result:  PASS 
       END  

 843 : Check ARI forwarding enable rule  
       START  
       No DP/ iEP_RP type device found.Skipping test
       PCI_IN_17
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 844 : Check device under RP in same ECAM
       START  
       No DP/ UP/iEP_EP type device found. Skipping test
       PCI_IN_04
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 845 : Check all RP in HB is in same ECAM
       START  
       No RP/ iEP_RP type device found. Skipping test
       PCI_IN_03
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 846 : Check RP Byte Enable Rules        
       START  
       No RP/ iEP_RP type device found. Skipping test
       PCI_IN_18
                                  : Result:  PASS 
       END  

 847 : Check Config Txn for RP in HB     
       START  
       No RP/ iEP_RP type device found. Skipping test
       PCI_IN_12
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 848 : Check RootPort NP Memory Access   
       START  
       No RP/ iEP_RP type device found with valid Memory Base/Limit Reg.
       Skipping Test
       PCI_IN_13
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 849 : Check RootPort P Memory Access    
       START  
       No RP/ iEP_RP type device found with valid Memory Base/Limit Reg.
       Skipping Test
       PCI_IN_13
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 850 : Check L-Intr SPI Level-Sensitive  
       START  
       BDF - 0x100
       pal_pcie_get_legacy_irq_map unimplemented. Skipping test
       PCI_LI_01, PCI_LI_03
       Checkpoint --  2                  : Result:  SKIPPED 
       END  

 851 : Check Sec Bus Reset For iEP_RP    
       START  
       No iEP_RP type device found. Skipping test
       IE_RST_2
       Checkpoint --  2                  : Result:  SKIPPED 
       END  

 852 : Check ATS Support Rule            
       START  
       BDF - 0x100
       No RCiEP/ iEP_EP type device found with ATC available. Skipping test
       RE_SMU_2
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 856 : Check iEP-RootPort P2P Support    
       START  
       pal_pcie_p2p_support API is unimplemented 
       IE_ACS_2
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 857 : Check RCiEP, iEP_EP P2P Supp      
       START  
       BDF - 0x100
       No RCiEP/ iEP_EP type device with Multifunction and P2P support.Skipping test
       IE_ACS_1
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 858 : Read and write to RCiEP BAR reg   
       START  
       BDF - 0x100 BAR offset0x10 value is 0x82560000     
       The BAR supports 32-bit address capability
       BDF - 0x100 BAR offset0x14 value is 0x82540000     
       The BAR supports 32-bit address capability
       RE_BAR_1
                                  : Result:  PASS 
       END  

 859 : Check RCEC Class code and Ext Cap     
       START  
       No RCEC type device found. Skipping test
       RE_PCI_2
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 860 : Check RCiEP Hdr type & link Cap   
       START  
       BDF - 0x100
       Link Capabilities reg check failed
       Invalid Link Capabilities 0x1
       Failed on PE -    0 for Level=  7 
       RE_PCI_1
       Checkpoint --  1                  : Result:  FAIL 
       END  

 863 : Slot Cap, Control and Status register rules      
       START  
       Number of bit-field entries to check 26
       IE_REG_4
       Checkpoint --  1                  : Result:  SKIPPED 
       END  

 861 : Check RootPort P&NP Memory Access 
       START  
       BDF - 0x100
       BDF - 0x300
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0
hrw commented 1 year ago

I think that bug can be somewhere in our QEMU/EDK2 patches.

Sujana-M commented 1 year ago

Hi @hrw,

Thanks for sharing the QEMU and EDK2 patches. I am still facing the same issue with the edk2-platforms.

To help further debug on the edk2 patches, I have added few debug prints as part of the test in my fork https://github.com/Sujana-M/sbsa-acs/commit/de9b1f9320828261941d52f10330e818dcccb6a8. Can you please share logs by taking this patch?

Request you to share the logs by running at level 7 and verbosity 1 (-l 7 -v 1).

Thanks, Sujana

hrw commented 1 year ago

Applied this commit on top of sbsa-acs:

 861 : Check RootPort P&NP Memory Access
       START
       BDF - 0x100
       BDF - 0x200
       BDF - 0x300
    RP BDF - 0x300
    BAR Base - 0x810C5000
       Received exception of type: 0
       Received exception of type: 0
       Received exception of type: 0

My command:

./code/qemu/build/aarch64-softmmu/qemu-system-aarch64 -machine sbsa-ref
 -m 4096 -smp 4 -cpu max -drive if=pflash,file=SBSA_FLASH0.fd,format=raw
 -drive if=pflash,file=SBSA_FLASH1.fd,format=raw
 -drive file=fat:rw:/home/marcin/devel/linaro/sbsa-qemu/sbsa-ref-status/disks/virtual/,format=raw 
-net nic -net user -usb -device usb-kbd -device usb-tablet -nographic
 -watchdog-action none -no-reboot -monitor telnet::45454,server,nowait
 -serial stdio 
-device pcie-root-port,id=root_port_for_igb,chassis=1,slot=2 -device igb 
-device pcie-root-port,id=root_port_for_ac97,chassis=1,slot=9 -device ac97
Sujana-M commented 1 year ago

Hi @hrw,

I tried the above set of command and still face the below same issue.

qemu-system-aarch64: -device pcie-root-port,id=root_port_for_igb,chassis=1,slot=2: MSI-X is not supported by interrupt controller

hrw commented 1 year ago

You need forked qemu/edk2-platforms. Links in one of previous comments.

hrw commented 1 year ago

We track it internally here: https://linaro.atlassian.net/browse/SRCPC-105

hrw commented 1 year ago

Turned out that this is due to QEMU configuration which disallows 1B/2B access to PCIe. Which is exactly what test 861 does.

We have change for QEMU queued.

chetan-rathore commented 1 year ago

Thanks @hrw for the update.

As the issue is QEMU configuration related, can we close this?

Thanks, ACS team

hrw commented 1 year ago

Some time passed, I looked at other issues in meantime and now I am back.

QEMU change says:

PCI spec says:

For all accesses to MSI-X Table and MSI-X PBA fields, software must use
aligned full DWORD or aligned full QWORD transactions; otherwise, the
result is undefined.

PCI specs are not easily available so I can not check in it.

Test 861 access MSI-X table with 1 or 2 byte size transactions. Which feels wrong.

hrw commented 1 year ago

@chetan-rathore @Sujana-M @gowthamsiddarthd ping

gowthamsiddarthd commented 1 year ago

Hi @hrw,

SBSA Test 861 corresponds with rule S_PCIe_02. It specifically verifies whether Root Ports (RPs) are capable of facilitating 1-byte (1B) and 2-byte (2B) read and write transactions to and from both Prefetchable and non-prefetchable memory regions. These transactions are directly associated with the memory Base Address Registers (BARs) rather than involving access to the MSI/MSI-X tables. Could you kindly validate the accuracy of this understanding?

Regards, Gowtham, The ACS Team