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Issue tracking for the ARM Trusted Firmware project
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Rationalize TF UART usage in platform ports #220

Closed danh-arm closed 8 years ago

danh-arm commented 10 years ago

The way that UARTs are used by TF in the FVP and Juno ports is inconsistent. The FVPs have 4 UARTs available for use, UART0 - UART3. Juno also has 4 UARTs but 2 of these are SoC UARTs, which are exposed via connectors on the back panel, and 2 are FPGA UARTs, which are only accessible via headers on the motherboard (J55 and J56).

The current usage is as follows:

FVPs Juno
SCP N/A SoC UART1
BL1/BL2 UART0 FPGA UART0
BL3-1 UART0 FPGA UART0
BL3-2 (TSP) UART1 FPGA UART1
UEFI UART0 SoC UART0
Linux UART0 SoC UART0

The issues with this are as follows:

So the proposed changes are as follows:

FVPs Juno
SCP N/A FPGA UART1*
BL1/BL2 UART0 SoC UART0*
BL3-1 (cold boot) UART0 SoC UART0*
BL3-1 (runtime) UART1* SoC UART1*
BL3-2 (TSP, cold) UART0* SoC UART0*
BL3-2 (TSP, runtime) UART2* FPGA UART0*
UEFI UART0 SoC UART0
Linux UART0 SoC UART0

* = changed UARTs

danh-arm commented 10 years ago

I updated the description here to make the distinction between the UARTs used on the cold boot path and the UARTs used at runtime.

For BL3-1 and BL3-2, these UARTs change between cold boot time and runtime. Supporting this requires additional platform hooks in the BL entrypoint (or main function) to allow platform code to re-initialize the console when the BL has finished its part in the cold boot path.

Until this supported properly, an interim solution will be to:

soby-mathew commented 8 years ago

An update to the issue description. We decided that the TSP will use the runtime console for all output because of the complexities involved in synchronous and asynchronous initialization of TSP (depending on TSP_INIT_ASYNC build flag).