search

ARM-software / tf-issues

Issue tracking for the ARM Trusted Firmware project
37 stars 16 forks source link

Question: Multi-core reset handling #714

Closed coach-bin closed 1 year ago

coach-bin commented 1 year ago

Hi experts, I'm trying to port TF-A and OPTEE into multi-core platform. I'm using own SPL, and I want to port BL31 only from TF-A (ROM-SPL-BL31-..)

I have 2 questions:

  1. Should I release reset of secondary cores from SPL?
  2. What address should be set for RVBAR of secondary cores?
ssg-bot commented 1 year ago

Hello @coach-bin!

Thank you for raising an issue for Trusted Firmware-A.

The TF-A project has now migrated to www.trustedfirmware.org. This issue tracker will still remain accessible for some time, but only for historical reasons. From now on you should raise new issues on trustedfirmware.org.

If it is a query or a design discussion it is better discussed via the mailing list. If it is issue/bug which need to be tracked, raise an issue in the issue tracking board and also send an email to the mailing list to notify the TF-A community.

How do I raise issues for TF-A?

Please use our new issue tracking board. For this you just need to login with your existing GitHub account. We also have a guide to help you raise the issue with the appropriate labels and tags. This way it will be easier for both you and us to track and address the issue most effectively.

We are looking forward to seeing you in trustedfirmware.org!

The Trusted Firmware-A team

sandrine-bailleux-arm commented 1 year ago

Hello,

First of all, please note that the TF-A project is no longer active on Github. It has migrated to www.trustedfirmware.org. Questions like yours should be sent to the project's mailing list instead:

https://lists.trustedfirmware.org/mailman3/lists/tf-a.lists.trustedfirmware.org/

I'll try to answer your question here on Github just for this time, though. If you need any more information after that, please post to the TF-A mailing list, where everyone can benefit and contribute to the discussion.

As you are using your own ROM and SPL (in lieu of TF-A BL1 and BL2), I believe you need to build TF-A with the RESET_TO_BL31 feature enabled. Please refer to the following page for more details:

https://trustedfirmware-a.readthedocs.io/en/latest/design/reset-design.html#using-bl31-entrypoint-as-the-reset-address

Coming back to your questions:

You can, but then you need to prevent secondary cores from progressing further until such point that the primary core has finished all its initializations. This logic needs to be implemented in your platform code within BL31, specifically in plat_secondary_cold_boot_setup().

If you don't have this synchronization mechanism in place then there is a risk that secondary cores will do things too early.

As an example, you could put secondary cores into a WFI loop until they receive a CPU_ON power management call (typically sent by Linux).

RVBAR for secondary cores should be set to the base address of BL31. Note that in RESET_TO_BL31=1 case, BL31 is a position-independent executable so you may load wherever you need.

Best regards, Sandrine

coach-bin commented 1 year ago

@sandrine-bailleux-arm Thanks for your feedback. I'll look into the code more and if I have any additional questions, I'll ask them via the mailing list.