In case of catastrophic bus failure at radio end, we shouldn't reset the chip
as it will cause the chip to hang and then burst out interrupts in a fury resulting
in an ISR queue overflow.
rather than that we gracefully accept the failure and set the radio to sleep and
set the state to idle. In addition to that we inform the upper layers about the
failure.
A little touch up to the FHSS case, was actually a leftover from the previous PR.
We don't use FHSS mode, that was why we didn't catch in the testing.
hasnainvirk
commented
6 years ago
In case of catastrophic bus failure at radio end, we shouldn't reset the chip as it will cause the chip to hang and then burst out interrupts in a fury resulting in an ISR queue overflow. rather than that we gracefully accept the failure and set the radio to sleep and set the state to idle. In addition to that we inform the upper layers about the failure.
A little touch up to the FHSS case, was actually a leftover from the previous PR. We don't use FHSS mode, that was why we didn't catch in the testing.