12 and 15 MHz encoding issues

[MarcelMB]

The FPGA files for USBInterface-6mhz-3v3-INVERSE.bit & SBInterface-8mhz-3v3-INVERSE.bit in data/config seems to work fine. But going up to 12Mhz and 15 Mhz (USBInterface-12mhz-3v3-dbg.bit) even in a wired connection to miniscope it gets stuck at connected to XEM7310-A75

I'm sure it is not necessarily miniscope io related and rather some FPGA problem. Wondering if its actually just a bit file issue. Maybe @t-sasatani can test it in your setup if that's a similar problem

[sneakers-the-rat]

so that message should get printed here: https://github.com/Aharoni-Lab/miniscope-io/blob/d4e45971db290bee72cbfbaf7a86cd214b8279de/miniscope_io/devices/opalkelly.py#L34

which is called in the stream daq here: https://github.com/Aharoni-Lab/miniscope-io/blob/d4e45971db290bee72cbfbaf7a86cd214b8279de/miniscope_io/stream_daq.py#L254

i would try adding more logger.debug messages so we can narrow down where the hang would be. eg. the next line to upload the bitfile should emit a debug message or raise an error: https://github.com/Aharoni-Lab/miniscope-io/blob/d4e45971db290bee72cbfbaf7a86cd214b8279de/miniscope_io/devices/opalkelly.py#L49

does that happen? (and are your log levels set to debug in your .env file?)

[MarcelMB]

https://github.com/Aharoni-Lab/miniscope-io/blob/d4e45971db290bee72cbfbaf7a86cd214b8279de/miniscope_io/devices/opalkelly.py#L36-L52

Sorry. It was on "INFO". I changed it to "DEBUG". to see the debug messages in the above code. changed it here: https://github.com/Aharoni-Lab/miniscope-io/blob/main/.env.sample

For some reason it is still on "INFO"?!?!

[24-10-09T13:56:27] INFO [miniscope_io.okDev] Connected to XEM7310-A75

[MarcelMB]

just needed to open a new terminal.

so upload works of bitfile to FPGA. but read failed. so can be either a bitfile issue or miniscope firmware issue

[sneakers-the-rat]

ya that's sorta beyond me. ideally that error would be more informative, but ya that's something in the bitfile or the fpga. seems like @phildong territory

[phildong]

my guess is either something wrong with the connection (e.g. wrong pin) or the source MCU/sensor was not sending data. @MarcelMB could you confirm with an oscilloscope?

[MarcelMB]

tested MCU output that is wired to the FPGA and its working fine.

If you could create a new 12 MHz file with J2-2 Signal and J2-38 GND

logic 0 is represented by a high–low Manchester logic 1 is represented by a low–high Manchester should be following IEEE standards

If that works we can create a few other frequencies

[sneakers-the-rat]

what would it take for us to be able to document how someone might generate a bitfile?

[MarcelMB]

This is the only part of the data pipeline that is like a black box to me. So only @phildong knows how this black magic works ;) and could write some docs on how to generate them

[MarcelMB]

closed this earlier because we got new bitfiles that work

[sneakers-the-rat]

ya ya lets move this to more specific issue my bad