Aimini hm-51 issues - Githubissues

Aimini / hm-51

Home-made 8051 CPU.

MIT License

1 stars 0 forks source link

issues

Newest

Newest Most commented Recently updated Oldest Least commented Least recently updated

update ALU document

#20 Aimini opened 4 years ago
0
make hardware design closer to reality

#19 Aimini opened 4 years ago
1
Add ISR for py51.

#18 Aimini closed 4 years ago
2
MOVX A, @Ri; MOVX @Ri, A; optmization.

#17 Aimini opened 4 years ago
2
Optimize instructions with single operation BR (XX) in one cycle.

#16 Aimini closed 4 years ago
2
IRAM range error.

#15 Aimini closed 4 years ago
2
MUL AB, result low byte optmization.

#14 Aimini opened 4 years ago
1
Reduce MUL AB cycle by add function ZF_B

#13 Aimini opened 4 years ago
0
Reduce CPL b cycle by add function CPLB.

#12 Aimini closed 4 years ago
1
Reduce CJNE cycle by add functon ZF_B:

#11 Aimini closed 4 years ago
1
ALUD: AND and OR function encoding changed.

#10 Aimini opened 4 years ago
0
ALUD: ZF function bug.

#9 Aimini closed 4 years ago
2
The Ri function in alud.py is inconsistent with the description in /srd/alu/README.md

#8 Aimini opened 4 years ago
0
Add document for test.

#7 Aimini opened 4 years ago
0
A51 test generator script: auto call do function in `test(do)` in __util.py

#6 Aimini closed 4 years ago
1
Add heading anchor for ALUS table in /src/alu/README.md

#5 Aimini closed 4 years ago
1
ALUD: INSB and OR can't encode together.

#4 Aimini closed 4 years ago
2
Please finish ALUD, SHIRQ function description.

#3 Aimini opened 4 years ago
0
Add description/constraint document about decoder script.

#2 Aimini opened 4 years ago
0
add ALUD document

#1 Aimini closed 4 years ago
2