Desired Register set

[Poofjunior]

• raw position
• raw torque (reaction torque from mouse)
• raw current (applied torque from brake)
• 5 register spaces
• aggregate register of the first 3 registers in an array: [raw position, raw torque, raw current]
• raw sensors dispatch rate hz
• current setpoint
• "tare" (position, current, torque)
• Error register
  • brake disconnected
  • current setpoint and sensed current mismatch. (out of range)

[Poofjunior]

updated register set:

#pragma pack(push, 1)
struct app_regs_t
{
    uint32_t encoder_ticks;              // 32
    uint16_t reaction_torque;               // 33
    uint16_t brake_current;        // 34
    uint32_t sensors[3]; // aggregate vector
                         // [position, uint32(torque), uint32(current)]
    uint32_t sensor_dispatch_frequency_hz;  // 36
    uint16_t brake_current_setpoint;   // 37 // TODO: account for offset when specifying setpoint.
    uint8_t tare;   // { unused[15:3], encoder[2], torque[1], brake_current[0]};
    //uint16_t errors;   // bitfields
    //uint8_t enable_events; // >0 = error_state changes will send EVENT msgs.
    // More app "registers" here.
} app_regs;
#pragma pack(pop)

[bruno-f-cruz]

uint8_t tare;   // { unused[15:3], encoder[2], torque[1], brake_current[0]};

Can this be inverted to match the order of the registers? ie.: encoder[0], torque[1], brake_current[2]

Also the register seems to be misspece. will it be u16 or u8?

[Poofjunior]

yes. I'll plan to make it:

• 16-bit
• {unused[15:3], brake_current[2], torque[1], encoder[1]}

[bruno-f-cruz]

Can be closed. Tested and working!