Closed YusufKhan-gamedev closed 2 years ago
What specifically are you confused about.
What specifically are you confused about.
Every single function, how do I r/w to a specif device+vendor, how do I find the base address in memory for a pci device with knowing the device+vendor. There is currently minimal documentation on pci.rs.
https://wiki.osdev.org/PCI I don't know much Rust well, but the code is very readable if you have osdev and PCI knowledge already.
https://wiki.osdev.org/PCI I don't know much Rust well, but the code is very readable if you have osdev and PCI knowledge already.
I thought that, until I actually tried to do something with it.... I just want to hook up some middleware to aero so I can add drm.
On gh pages this doesn't show read() write() etc.
On gh pages this doesn't show read() write() etc.
because there isn't such functions, do you even know how PCI works? lol
because there isn't such functions, do you even know how PCI works? lol
I know that, its under PCIHeader, but still is a bit buried and doesnt include how someone could actually use those functions(mostly) just that you have to provide a PciHeader and a offset.
Hot Take: People who dont understand how the hardware interfaces with other hardware shouldnt be barred from doing kernel work. kernel interfaces should always be documented, put a comment.
is a bit buried
Since you call the function on a PCI header lol. This is like basic and you should know this when programming :^) This function is ment to be called on a PCI header.
People who dont understand how the hardware interfaces with other hardware shouldnt be barred from doing kernel work. kernel interfaces should always be documented, put a comment.
They are, you should just dig deeper into the documentation. You cannot expect the whole docs of every single struct to be on a single page. That would be messy right? Thats why they are dont in sub pages. Its done for a reason mate :^)
how someone could actually use those functions(mostly) just that you have to provide a PciHeader and a offset.
Exactly you call this function on a PCI header and provide it an offset plus as the docs say it takes a type parameter T
which's size will be taken to read thats it :^) nothing special. Its easy. What is confusing about it?
How do I rw data from a specific vendorxdevice id combo
that seems like something to put in a pr.....
The PCI kernel interfaces for aero have to be properly documented, your code doesnt explain itself.