tDSS timing violation when ODELAY_SUPPORTED=0

[CapSylar]

Hello, I just want to thank you for developing this controller and open sourcing it! It must have been a huge undertaking. I'm trying to use you controller in a project of mine that is targeting a Nexys Video board. I've tried synthesizing your controller with ODELAY_SUPPORTED=0 (DDR3 connected to an HR bank) and running it but it didn't work, which led me to suspect that I've must have turned a blind eye to some warnings and indeed, a tDSS violation is coming up all the time!

My knowledge of the DDR3 standard is limited, but I've measured the DQS, DQS# falling to CK, C# rising time to be 100ps, which is indeed a violation, where the standard dictates a 0.18ns minimum. I've trying looking into the phy.v file, but I could not understand how you meant controlling the delay of DQS without an ODELAY2 primitive.

[regymm]

Hi, thanks for your interest! I've got this running on Nexys Video (with both vivado and open source toolchain), this is the instantiation and constraint file I'm using:

https://github.com/regymm/quasiSoC/blob/master/rtl/board-specific/nexys-video-openxc7/quasi_main_openxc7.v

Hope this may help you!

[AngeloJacobo]

Thanks @regymm!

Hi @CapSylar, all outgoing signals will not be delayed and calibrated as there is no ODELAY. This would mean this controller will only work for FPGAs with minimal PCB trace between the FPGA chip and the DDR3 RAM (such as Arty S7). For the tDSS violation, this is intruguing. But as @regymm had mentioned, UberDDR3 works for Nexysy video on his side. His instantiation and constraint file might help you.

But the ddr3_top instantiated on @regymm project was the old version of UberDDR3, so please use the commit 81865ea (https://github.com/AngeloJacobo/UberDDR3/tree/81865ea2f877451a4021ba80702d44660d9b2a35) if you would like to use his project.

[AngeloJacobo]

Also @CapSylar, I'm not sure which commit of UberDDR3 you had cloned. But I made a mistake days ago pushing a bug on the design. The latest commit should have fixed that bug.

[CapSylar]

Hi @AngeloJacobo and @regymm, pulled the latest master, works like a charm! When simulating with questa, the tool complains about the use of constant function and what not. I'll open a separate issue later! Thanks again!