AntonLydike / riscemu

RISC-V emulator in python
MIT License
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floats: Add fcvt instructions for doubles, and fix their overflow behaviour to reflect the spec #53

Closed AntonLydike closed 5 months ago

AntonLydike commented 5 months ago

This adds fcvt.d.w[u] and fcvt.w[u].d instructions, and fixes the fcvt.s.w[u] and fcvt.w[u].s instructions overflow behavior to correctly reflect the spec (Thanks Markus Böck for digging this out, as it's a bit difficult to find in the spec itself).

This also fixes a long standing bug in the way registers are stored that would introduce bugs in certain edge cases (registers are now always treated as signed values, just as the code expects in most places).

Pre-Merge Checklist: